diff options
| author | travis@sgi.com <travis@sgi.com> | 2008-01-30 13:33:10 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:33:10 +0100 |
| commit | ef97001f3d869d7cc1956e0cc0d89e514e3f7db0 (patch) | |
| tree | a66c041d96367f049143d63ebcc85e0b7d6dce34 /include/asm-x86/processor.h | |
| parent | a1bf250a6f31afb8caac166ae50dc7b89c38084c (diff) | |
x86: change size of APICIDs from u8 to u16
Change the size of APICIDs from u8 to u16. This partially
supports the new x2apic mode that will be present on future
processor chips. (Chips actually support 32-bit APICIDs, but that
change is more intrusive. Supporting 16-bit is sufficient for now).
Signed-off-by: Jack Steiner <steiner@sgi.com>
I've included just the partial change from u8 to u16 apicids. The
remaining x2apic changes will be in a separate patch.
In addition, the fake_node_to_pxm_map[] and fake_apicid_to_node[]
tables have been moved from local data to the __initdata section
reducing stack pressure when MAX_NUMNODES and MAX_LOCAL_APIC are
increased in size.
Signed-off-by: Mike Travis <travis@sgi.com>
Reviewed-by: Christoph Lameter <clameter@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/processor.h')
| -rw-r--r-- | include/asm-x86/processor.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h index e701ac5487e5..81ecfed83e47 100644 --- a/include/asm-x86/processor.h +++ b/include/asm-x86/processor.h @@ -90,14 +90,14 @@ struct cpuinfo_x86 { #ifdef CONFIG_SMP cpumask_t llc_shared_map; /* cpus sharing the last level cache */ #endif - unsigned char x86_max_cores; /* cpuid returned max cores value */ - unsigned char apicid; - unsigned short x86_clflush_size; + u16 x86_max_cores; /* cpuid returned max cores value */ + u16 apicid; + u16 x86_clflush_size; #ifdef CONFIG_SMP - unsigned char booted_cores; /* number of cores as seen by OS */ - __u8 phys_proc_id; /* Physical processor id. */ - __u8 cpu_core_id; /* Core id */ - __u8 cpu_index; /* index into per_cpu list */ + u16 booted_cores; /* number of cores as seen by OS */ + u16 phys_proc_id; /* Physical processor id. */ + u16 cpu_core_id; /* Core id */ + u16 cpu_index; /* index into per_cpu list */ #endif } __attribute__((__aligned__(SMP_CACHE_BYTES))); |