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authorLinus Torvalds <torvalds@linux-foundation.org>2012-04-03 10:13:34 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-04-03 10:13:34 -0700
commit01627d968c8b5e2810fe8c417b406b968297c236 (patch)
treee49077d45d6998adee302f142f7d54e472c81bc3 /include/drm
parente1a7eb08ee097e97e928062a242b0de5b2599a11 (diff)
parente37acc0f5ea18ff1ea4db96a84a51b90044c0dbd (diff)
Merge branch 'drm-fixes-intel' of git://people.freedesktop.org/~airlied/linux
Pull drm update from Dave Airlie: "This pull just contains a forward of the Intel fixes from Daniel. The only annoyance is the RC6 enable, which really should have made -next, but since Ubuntu are shipping it I reckon its getting a good testing now by the time 3.4 comes out. The pull from Daniel contains his pull message to me: "A few patches for 3.4, major part is 3 regression fixes: - ppgtt broke hibernate on snb/ivb. Somehow our QA claims that it still works, which is why this has not been caught earlier. - ppgtt flails in combination with dmar. I kinda expected this one :( - fence handling bugfix for gen2/3. Iirc this one is about a year old, fix curtesy Chris Wilson. I've created an shockingly simple i-g-t test to catch this in the future." Wrt regressions I've just got a report that gmbus (newly enabled again in 3.4) is a bit noisy. I'm looking into this atm. Also included are the rc6 enable patches for snb from Eugeni. I wanted to include these in the main 3.4 pull but screwed it up. Please hit me. Imo these kind of patches really should go in before -rc1, but in thise case rc6 has brought us tons of press and guinea pigs^W^W testers and ubuntu is already running with it. So I estimate a pretty small chance for this to blow up. And some smaller things: - two minor locking snafus - server gt2 ivb pciid - 2 patches to sanitize the register state left behind by the bios some more - 2 new quirk entries - cs readback trick against missed IRQs from ivb also enabled on snb - sprite fix from Jesse" Let's see if the "enable RC6 on sandybridge" finally works and sticks. I've been enabling it by hand (i915.i915_enable_rc6=1) for several months on my Macbook Air, and it definitely makes a difference (and has worked for me). But every time we enabled it before it showed some odd hw buglet for *somebody*. This time it's all good, I'm sure. * 'drm-fixes-intel' of git://people.freedesktop.org/~airlied/linux: drm/i915: treat src w & h as fixed point in sprite handling code drm/i915: no-lvds quirk on MSI DC500 drm/i915: Add lock on drm_helper_resume_force_mode drm/i915: don't leak struct_mutex lock on ppgtt init failures drm/i915: disable ppgtt on snb when dmar is enabled drm/i915: add Ivy Bridge GT2 Server entries drm/i915: properly clear SSC1 bit in the pch refclock init code drm/i915: apply CS reg readback trick against missed IRQ on snb drm/i915: quirk away broken OpRegion VBT drm/i915: enable plain RC6 on Sandy Bridge by default drm/i915: allow to select rc6 modes via kernel parameter drm/i915: Mark untiled BLT commands as fenced on gen2/3 drm/i915: properly restore the ppgtt page directory on resume drm/i915: Sanitize BIOS debugging bits from PIPECONF
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/intel-gtt.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index 0a0001b9dc78..923afb5dcf0c 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -44,4 +44,8 @@ void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries,
/* flag for GFDT type */
#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
+#ifdef CONFIG_INTEL_IOMMU
+extern int intel_iommu_gfx_mapped;
+#endif
+
#endif