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authorKeith Packard <keithp@keithp.com>2008-10-14 19:55:10 -0700
committerDave Airlie <airlied@linux.ie>2008-10-18 07:10:53 +1000
commitba1eb1d825fdef40f69871caf8e5842d00efbbc5 (patch)
tree73b45769022788532ee169c270e2792a229b1a40 /include/drm
parent50aa253d820ad4577e2231202f2c8fd89f9dc4e6 (diff)
i915: Map status page cached for chips with GTT-based HWS location.
This should improve performance by avoiding uncached reads by the CPU (the point of having a status page), and may improve stability. This patch only affects G33, GM45 and G45 chips as those are the only ones using GTT-based HWS mappings. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/drmP.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/drm/drmP.h b/include/drm/drmP.h
index 90a9e0247d58..59c796b46ee7 100644
--- a/include/drm/drmP.h
+++ b/include/drm/drmP.h
@@ -1016,7 +1016,8 @@ extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start);
extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
struct page **pages,
unsigned long num_pages,
- uint32_t gtt_offset);
+ uint32_t gtt_offset,
+ uint32_t type);
extern int drm_unbind_agp(DRM_AGP_MEM * handle);
/* Misc. IOCTL support (drm_ioctl.h) */