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authorFancy Fang <chen.fang@nxp.com>2017-07-07 14:07:06 +0800
committerLeonard Crestez <leonard.crestez@nxp.com>2018-08-24 12:41:33 +0300
commitb74781f58c962deaa8853857ef86198331035d1e (patch)
treee32a4c90b9dd98dcc70684e7a948b127d064947f /include/dt-bindings/clock/imx8mq-clock.h
parenta1512e15a05f6d857660dfb527bfbad20816182a (diff)
MLK-15354 clk: imx: imx8mq: add video_pll2 clock
Add video_pll2 SSCG PLL clock in anamix which can be used by HDMI and DCSS. Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Diffstat (limited to 'include/dt-bindings/clock/imx8mq-clock.h')
-rw-r--r--include/dt-bindings/clock/imx8mq-clock.h12
1 files changed, 11 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index a64b844b0e84..fd33c6e737ee 100644
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -597,5 +597,15 @@
/* txesc clock */
#define IMX8MQ_CLK_DSI_IPG_DIV 466
-#define IMX8MQ_CLK_END 467
+/* VIDEO2 PLL */
+#define IMX8MQ_VIDEO2_PLL1_REF_SEL 467
+#define IMX8MQ_VIDEO2_PLL1_REF_DIV 468
+#define IMX8MQ_VIDEO2_PLL1 469
+#define IMX8MQ_VIDEO2_PLL1_OUT 470
+#define IMX8MQ_VIDEO2_PLL1_OUT_DIV 471
+#define IMX8MQ_VIDEO2_PLL2 472
+#define IMX8MQ_VIDEO2_PLL2_DIV 473
+#define IMX8MQ_VIDEO2_PLL2_OUT 474
+
+#define IMX8MQ_CLK_END 475
#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */