diff options
| author | Dong Aisheng <aisheng.dong@nxp.com> | 2019-01-29 20:26:18 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:28:02 +0800 |
| commit | f8463d8ce67706adf8a997d8b999a290a2414168 (patch) | |
| tree | a52dec5a479e48c3f2fd5513843d6c58891448d7 /include/dt-bindings/clock | |
| parent | 42a5e53f1da58375e46a328230d2d6ada916d2a0 (diff) | |
dt-bindings: clock: imx8: add dc0 lpcg clock id
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/imx8-clock.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/imx8-clock.h b/include/dt-bindings/clock/imx8-clock.h index 61842ea10b25..47f6075bb590 100644 --- a/include/dt-bindings/clock/imx8-clock.h +++ b/include/dt-bindings/clock/imx8-clock.h @@ -456,4 +456,32 @@ #define IMX_CSI_LPCG_CSI1_CLK_END 3 +/* DC SS LPCG */ +#define IMX_DC0_LPCG_PRG0_RTRAM_CLK 0 +#define IMX_DC0_LPCG_PRG0_APB_CLK 1 +#define IMX_DC0_LPCG_PRG1_RTRAM_CLK 2 +#define IMX_DC0_LPCG_PRG1_APB_CLK 3 +#define IMX_DC0_LPCG_PRG2_RTRAM_CLK 4 +#define IMX_DC0_LPCG_PRG2_APB_CLK 5 +#define IMX_DC0_LPCG_PRG3_RTRAM_CLK 6 +#define IMX_DC0_LPCG_PRG3_APB_CLK 7 +#define IMX_DC0_LPCG_PRG4_RTRAM_CLK 8 +#define IMX_DC0_LPCG_PRG4_APB_CLK 9 +#define IMX_DC0_LPCG_PRG5_RTRAM_CLK 10 +#define IMX_DC0_LPCG_PRG5_APB_CLK 11 +#define IMX_DC0_LPCG_PRG6_RTRAM_CLK 12 +#define IMX_DC0_LPCG_PRG6_APB_CLK 13 +#define IMX_DC0_LPCG_PRG7_RTRAM_CLK 14 +#define IMX_DC0_LPCG_PRG7_APB_CLK 15 +#define IMX_DC0_LPCG_PRG8_RTRAM_CLK 16 +#define IMX_DC0_LPCG_PRG8_APB_CLK 17 +#define IMX_DC0_LPCG_DPR0_APB_CLK 18 +#define IMX_DC0_LPCG_DPR0_B_CLK 19 +#define IMX_DC0_LPCG_DPR1_APB_CLK 20 +#define IMX_DC0_LPCG_DPR1_B_CLK 21 +#define IMX_DC0_LPCG_RTRAM0_CLK 22 +#define IMX_DC0_LPCG_RTRAM1_CLK 23 + +#define IMX_DC0_LPCG_CLK_END 24 + #endif /* __DT_BINDINGS_CLOCK_IMX_H */ |