diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2018-08-02 13:31:20 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:33:04 +0800 |
| commit | f194a827e14525626f0c9fb53f93513739d38b78 (patch) | |
| tree | a753914e6933d02e8410f82e26f99dcfaa8af8bf /include/dt-bindings/pinctrl | |
| parent | 814523360d5a1f9fd63409d30500ae99e46f30ba (diff) | |
MLK-19113-1 ARM64: imx: enable l1.1 aspm for imx8mm
In the L1.1 ASPM implementation, the CLK_REQ# should be
configured as open drain, pull up and input mode.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Diffstat (limited to 'include/dt-bindings/pinctrl')
| -rw-r--r-- | include/dt-bindings/pinctrl/pins-imx8mm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/dt-bindings/pinctrl/pins-imx8mm.h b/include/dt-bindings/pinctrl/pins-imx8mm.h index 351a820db639..6580c6a2bb61 100644 --- a/include/dt-bindings/pinctrl/pins-imx8mm.h +++ b/include/dt-bindings/pinctrl/pins-imx8mm.h @@ -580,7 +580,7 @@ #define MX8MM_IOMUXC_I2C3_SDA_TPSMP_HDATA21 0x228 0x490 0x000 0x7 0x0 #define MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x22C 0x494 0x000 0x0 0x0 #define MX8MM_IOMUXC_I2C4_SCL_PWM2_OUT 0x22C 0x494 0x000 0x1 0x0 -#define MX8MM_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B 0x22C 0x494 0x524 0x2 0x0 +#define MX8MM_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B 0x22C 0x494 0x524 0x12 0x0 #define MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x22C 0x494 0x000 0x5 0x0 #define MX8MM_IOMUXC_I2C4_SCL_TPSMP_HDATA22 0x22C 0x494 0x000 0x7 0x0 #define MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x230 0x498 0x000 0x0 0x0 |