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authorAntoine Tenart <antoine.tenart@free-electrons.com>2015-10-15 20:55:55 +0200
committerSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2015-10-15 20:55:55 +0200
commit515f1a2027006839c08c842da919abfcc3c7ae2a (patch)
treef5fddc6bbacde7265e2b194debd2a474a57dcdd8 /include/dt-bindings
parent0f0ebb13493f1133aa9fbea44783f0e5380a9770 (diff)
clk: berlin: add cpuclk
Add cpuclk in the Berlin BG2Q clock driver. This clk has a divider fixed to 1. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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