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authorKishon Vijay Abraham I <kishon@ti.com>2021-03-30 16:49:26 +0530
committerVignesh Raghavendra <vigneshr@ti.com>2021-03-31 20:45:42 +0530
commit30328d2ba1a9212289989f52cab2c2f8ec30ae31 (patch)
tree16b02afc0a4c3ac9f4b688acb6e2d2ab007f81ee /include/dt-bindings
parent57bdaf3ecb19e74e96077a0169fb0bedf518e66b (diff)
dt-bindings: ti-serdes-mux: Add defines for AM64 SoC
AM64 has a single lane SERDES which can be configured to be used with either PCIe or USB. Define the possilbe values for the SERDES function in AM64 SoC here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/mux/ti-serdes.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index 9047ec6bd3cf..d417b9268b16 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -90,4 +90,9 @@
#define J7200_SERDES0_LANE3_USB 0x2
#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
+/* AM64 */
+
+#define AM64_SERDES0_LANE0_PCIE0 0x0
+#define AM64_SERDES0_LANE0_USB 0x1
+
#endif /* _DT_BINDINGS_MUX_TI_SERDES */