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authorShawn Guo <shawn.guo@freescale.com>2014-09-15 21:04:54 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-01-15 21:17:33 -0600
commit72f543577622e8f0c721ce6f23ee79977a0ad701 (patch)
tree4ea3766cce4d1bb7829300e93553bdd2427a9130 /include/dt-bindings
parent6e31797e1643168f48591b42767022b04499ae50 (diff)
ENGR00318063-7: ARM: imx6q: mmdc_ch_axi clock should be non-gateable
Per the updated CCM chapter, there is no gate for clock mmdc_ch1_axi. And there is a gate for mmdc_ch0_axi, but the gate also controls FABRIC clock, which means the gate cannot be gated anyway. That said, implementing these two clocks as gate does not make too much sense. Remove these two gate clocks by pointing IMX6QDL_CLK_MMDC_CH0_AXI and IMX6QDL_CLK_MMDC_CH1_AXI to the dividers. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/imx6qdl-clock.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index dd3a82a63784..2e3b39b85f05 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -109,8 +109,6 @@
#define IMX6QDL_CLK_VPU_AXI_PODF 99
#define IMX6QDL_CLK_CKO1_PODF 100
#define IMX6QDL_CLK_AXI 101
-#define IMX6QDL_CLK_MMDC_CH0_AXI_PODF 102
-#define IMX6QDL_CLK_MMDC_CH1_AXI_PODF 103
#define IMX6QDL_CLK_ARM 104
#define IMX6QDL_CLK_AHB 105
#define IMX6QDL_CLK_APBH_DMA 106