diff options
| author | Pradeep Goudagunta <pgoudagunta@nvidia.com> | 2013-01-26 18:50:59 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:58:30 -0700 |
| commit | 15e420539f895cf7fb86fa1b7e94f3d16ff6dd36 (patch) | |
| tree | 532259b258e910b35ad26e706137e140b2ddf853 /include/linux/mfd/max77660 | |
| parent | af0feb7e3ec964fb56ea8700f348bd9fcae507e7 (diff) | |
mfd: max77660: Add 32k clk support
Bug 1216888
Change-Id: Id35b98ebb4fe0abfeb9aba682d51f9a70dd97b31
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/194400
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Diffstat (limited to 'include/linux/mfd/max77660')
| -rw-r--r-- | include/linux/mfd/max77660/max77660-core.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/include/linux/mfd/max77660/max77660-core.h b/include/linux/mfd/max77660/max77660-core.h index 9da2b27bc77a..0517ab47b527 100644 --- a/include/linux/mfd/max77660/max77660-core.h +++ b/include/linux/mfd/max77660/max77660-core.h @@ -119,6 +119,8 @@ #define MAX77660_REG_GLOBAL_CFG5 0x21 #define MAX77660_REG_GLOBAL_CFG6 0x22 #define MAX77660_REG_GLOBAL_CFG7 0xC0 +#define MAX77660_REG_CNFG32K1 0xA0 +#define MAX77660_REG_CNFG32K2 0xA1 #define MAX77660_REG_CID0 0x9A #define MAX77660_REG_CID1 0x9B @@ -203,7 +205,11 @@ #define GLBLCNFG7_EN2_MASK_MASK BIT(0) #define GLBLCNFG7_EN2_MASK_SHIFT 0 - +#define PWR_MODE_32KCLK_MASK (BIT(1) | BIT(0)) +#define OUT1_EN_32KCLK_MASK BIT(2) +#define OUT1_EN_32KCLK_SHIFT 2 +#define OUT2_EN_32KCLK_MASK BIT(3) +#define OUT2_EN_32KCLK_SHIFT 3 #define CID_DIDM_MASK (BIT(7)|BIT(6)|BIT(5)|BIT(4)) #define CID_DIDM_SHIFT 4 @@ -489,6 +495,8 @@ struct max77660_platform_data { unsigned char fg_i2c_addr; unsigned char haptic_i2c_addr; bool en_buck2_ext_ctrl; + bool en_clk32out1; + bool en_clk32out2; bool use_power_off; int system_watchdog_timeout; |