diff options
author | Richard Zhu <richard.zhu@freescale.com> | 2014-10-16 14:54:40 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:23:16 +0800 |
commit | d6e8ea1a7547a834fd350f682d38fab0d40860a8 (patch) | |
tree | 600c65674633e07e2d3a35175dd13c2892349bdf /include/linux/mfd | |
parent | aa83ecb07666e72980a50d04e5f2a5b9faebadc9 (diff) |
MLK-10009-2 ARM: imx6sx: Add imx6sx pcie related gpr bits definitions
Add imx6sx pcie related gpr bits definitions.
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
(cherry picked from commit 991fb25d62e3e2f550f98732f5bc00eeb98f78e3)
Diffstat (limited to 'include/linux/mfd')
-rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index 3d0ff5c86621..fe95e713957b 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -320,6 +320,7 @@ #define IMX6Q_GPR12_DEVICE_TYPE (0xf << 12) #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) #define IMX6Q_GPR12_LOS_LEVEL (0x1f << 4) +#define IMX6Q_GPR12_LOS_LEVEL_9 (0x9 << 4) #define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30) #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) @@ -449,6 +450,7 @@ #define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_MASK (0x1 << 26) #define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_ENABLE (0x1 << 26) #define IMX6SX_GPR5_VADC_TO_CSI_CAPTURE_EN_DISABLE (0x0 << 26) +#define IMX6SX_GPR5_PCIE_PERST BIT(18) #define IMX6SX_GPR5_PCIE_BTNRST_RESET BIT(19) #define IMX6SX_GPR5_CSI1_MUX_CTRL_MASK (0x3 << 4) #define IMX6SX_GPR5_CSI1_MUX_CTRL_EXT_PIN (0x0 << 4) @@ -463,6 +465,7 @@ #define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS (0x1 << 1) #define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK (0x1 << 1) +#define IMX6SX_GPR12_PCIE_PM_TURN_OFF BIT(16) #define IMX6SX_GPR12_PCIE_TEST_POWERDOWN BIT(30) #define IMX6SX_GPR12_PCIE_RX_EQ_MASK (0x7 << 0) #define IMX6SX_GPR12_PCIE_RX_EQ_2 (0x2 << 0) |