diff options
author | Ian Wisbon <ian.wisbon@timesys.com> | 2011-02-10 17:15:15 -0500 |
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committer | Ian Wisbon <ian.wisbon@timesys.com> | 2011-02-10 17:15:15 -0500 |
commit | a9d2ba1444b0af6c2d8534f0b306660ffc045bc6 (patch) | |
tree | 79b396bf70ae3795e6ee9a3b645e64f7e29474e7 /include/linux/mmc/mmc.h | |
parent | effff5718c380983788fe6c380671c18e15ac7c2 (diff) |
Linux 2.6.31 Release for Digi ConnectCore Wi-i.MX boards2.6.31-digi-201102101717
Diffstat (limited to 'include/linux/mmc/mmc.h')
-rw-r--r-- | include/linux/mmc/mmc.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index 14b81f3e5232..37a51b3122df 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h @@ -31,6 +31,7 @@ #define MMC_ALL_SEND_CID 2 /* bcr R2 */ #define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ #define MMC_SET_DSR 4 /* bc [31:16] RCA */ +#define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */ #define MMC_SWITCH 6 /* ac [31:0] See below R1b */ #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ #define MMC_SEND_EXT_CSD 8 /* adtc R1 */ @@ -249,11 +250,16 @@ struct _mmc_csd { * EXT_CSD fields */ +#define EXT_CSD_BOOT_BUS_WIDTH 177 /* R/W */ +#define EXT_CSD_BOOT_CONFIG 179 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ #define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_CARD_TYPE 196 /* RO */ #define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ +#define EXT_CSD_S_A_TIMEOUT 217 +#define EXT_CSD_BOOT_SIZE_MULT 226 /* RO, 1 bytes */ +#define EXT_CSD_BOOT_INFO 228 /* RO, 1 bytes */ /* * EXT_CSD field definitions @@ -265,10 +271,36 @@ struct _mmc_csd { #define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_DDR_52 (2<<1) /* Card can run at DDR 52MHz */ #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ +#define EXT_CSD_BUS_WIDTH_4_DDR 5 /* Card is in 4 bit ddr mode */ +#define EXT_CSD_BUS_WIDTH_8_DDR 6 /* Card is in 8 bit ddr mode */ + +#define EXT_CSD_BOOT_BUS_WIDTH_MASK (0x1F) +#define EXT_CSD_BOOT_BUS_WIDTH_MODE_MASK (0x3 << 3) +#define EXT_CSD_BOOT_BUS_WIDTH_MODE_SDR_NORMAL (0x0) +#define EXT_CSD_BOOT_BUS_WIDTH_MODE_SDR_HIGH (0x1) +#define EXT_CSD_BOOT_BUS_WIDTH_MODE_DDR (0x2) +#define EXT_CSD_BOOT_BUS_WIDTH_RST_WIDTH (1 << 2) +#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH_MASK (0x3) +#define EXT_CSD_BOOT_BUS_WIDTH_1_SDR_4_DDR (0x0) +#define EXT_CSD_BOOT_BUS_WIDTH_4_SDR_4_DDR (0x1) +#define EXT_CSD_BOOT_BUS_WIDTH_8_SDR_8_DDR (0x2) + +#define EXT_CSD_BOOT_ACK_ENABLE (0x1 << 6) +#define EXT_CSD_BOOT_PARTITION_ENABLE_MASK (0x7 << 3) +#define EXT_CSD_BOOT_PARTITION_DISABLE (0x0) +#define EXT_CSD_BOOT_PARTITION_PART1 (0x1 << 3) +#define EXT_CSD_BOOT_PARTITION_PART2 (0x2 << 3) +#define EXT_CSD_BOOT_PARTITION_USER (0x7 << 3) + +#define EXT_CSD_BOOT_PARTITION_ACCESS_MASK (0x7) +#define EXT_CSD_BOOT_PARTITION_ACCESS_DISABLE (0x0) +#define EXT_CSD_BOOT_PARTITION_ACCESS_PART1 (0x1) +#define EXT_CSD_BOOT_PARTITION_ACCESS_PART2 (0x2) /* * MMC_SWITCH access modes |