diff options
author | Tokunori Ikegami <ikegami.t@gmail.com> | 2022-03-24 02:04:56 +0900 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-06-14 18:12:03 +0200 |
commit | b35e08edb2c268647dab89c8e5be84e21e7e1f58 (patch) | |
tree | 0cc428e03ded94ee6433fb5c4706d005f248fd94 /include/linux/mtd/cfi.h | |
parent | 0c12d7625502545b8133334f551e5dec8ef610c1 (diff) |
mtd: cfi_cmdset_0002: Use chip_ready() for write on S29GL064N
commit 0a8e98305f63deaf0a799d5cf5532cc83af035d1 upstream.
Since commit dfeae1073583("mtd: cfi_cmdset_0002: Change write buffer to
check correct value") buffered writes fail on S29GL064N. This is
because, on S29GL064N, reads return 0xFF at the end of DQ polling for
write completion, where as, chip_good() check expects actual data
written to the last location to be returned post DQ polling completion.
Fix is to revert to using chip_good() for S29GL064N which only checks
for DQ lines to settle down to determine write completion.
Link: https://lore.kernel.org/r/b687c259-6413-26c9-d4c9-b3afa69ea124@pengutronix.de/
Fixes: dfeae1073583("mtd: cfi_cmdset_0002: Change write buffer to check correct value")
Cc: stable@vger.kernel.org
Signed-off-by: Tokunori Ikegami <ikegami.t@gmail.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220323170458.5608-3-ikegami.t@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/mtd/cfi.h')
-rw-r--r-- | include/linux/mtd/cfi.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index c98a21108688..f3c149073c21 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -286,6 +286,7 @@ struct cfi_private { map_word sector_erase_cmd; unsigned long chipshift; /* Because they're of the same type */ const char *im_name; /* inter_module name for cmdset_setup */ + unsigned long quirks; struct flchip chips[0]; /* per-chip data structure for each chip */ }; |