diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2005-05-31 20:39:20 +0100 |
---|---|---|
committer | Thomas Gleixner <tglx@mtd.linutronix.de> | 2005-06-29 14:15:17 +0200 |
commit | 0dfc62465ef92c7ddcb1ba223bf062453566fd0f (patch) | |
tree | 0156e9b9996cf43dd67ceed53a2b8da0a516cdec /include/linux/mtd/nand.h | |
parent | 7ca6448dbfb398bba36eda3c01bc14b86c3675be (diff) |
[MTD] NAND: Reorganize chip locking
The code was wrong in several aspects. The locking order was
inconsistent, the device aquire code did not reset a variable
after a wakeup and the wakeup handling was not working for
applications where multiple chips are sharing a single
hardware controller.
When a hardware controller is available the locking is now
reduced to the hardware controller lock and the waitqueue is
moved to the hardware controller structure in order to avoid
a wake_up_all().
The problem was pointed out by Ben Dooks, who also found the
missing variable reset as main cause for his deadlock problem.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/linux/mtd/nand.h')
-rw-r--r-- | include/linux/mtd/nand.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index bee78969cb21..9b5b76217584 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -5,7 +5,7 @@ * Steven J. Hill <sjhill@realitydiluted.com> * Thomas Gleixner <tglx@linutronix.de> * - * $Id: nand.h,v 1.71 2005/02/09 12:12:59 gleixner Exp $ + * $Id: nand.h,v 1.73 2005/05/31 19:39:17 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -253,10 +253,13 @@ struct nand_chip; * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices * @lock: protection lock * @active: the mtd device which holds the controller currently + * @wq: wait queue to sleep on if a NAND operation is in progress + * used instead of the per chip wait queue when a hw controller is available */ struct nand_hw_control { spinlock_t lock; struct nand_chip *active; + wait_queue_head_t wq; }; /** |