diff options
| author | Artem Bityutskiy <artem.bityutskiy@linux.intel.com> | 2013-03-19 10:29:26 +0200 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2013-04-05 13:21:41 +0100 |
| commit | 5bfa9b71a2d6642506e2dfdf49a66620f54f1d92 (patch) | |
| tree | 92f3fb5b82c858b39db9a30499ed089df7dcc822 /include/linux/mtd | |
| parent | 92a2645820d8ab97bc9cf74648dc0fbba652f3d2 (diff) | |
mtd: nand_ids: improve LEGACY_ID_NAND macro a bit
Notice that all the flashes belonging to the "legacy ID" class have 512 bytes
NAND page. This means we may simplify the 'LEGACY_ID_NAND()' macro as well as
the NAND ID table a little.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include/linux/mtd')
| -rw-r--r-- | include/linux/mtd/nand.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 13786f0ae12a..ebf970e11428 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -552,12 +552,11 @@ struct nand_chip { /* * A helper for defining older NAND chips where the second ID byte fully * defined the chip, including the geometry (chip size, eraseblock size, page - * size). + * size). All these chips have 512 bytes NAND page size. */ -#define LEGACY_ID_NAND(nm, devid, pagesz, chipsz, erasesz, opts) \ - { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = (pagesz), \ - .chipsize = (chipsz), .erasesize = (erasesz), \ - .options = (opts) } +#define LEGACY_ID_NAND(nm, devid, chipsz, erasesz, opts) \ + { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = 512, \ + .chipsize = (chipsz), .erasesize = (erasesz), .options = (opts) } /* * A helper for defining newer chips which report their page size and |