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authorJacob Pan <jacob.jun.pan@linux.intel.com>2010-07-16 10:19:22 -0700
committerJesse Barnes <jbarnes@virtuousgeek.org>2010-07-30 09:29:35 -0700
commit253d2e549818f5a4a52e2db0aba3dacee21e5b38 (patch)
tree535ff224cb89860809fa5d948e19e1f3342cf7b3 /include/linux/pci.h
parentfcd097f31a6ee207cc0c3da9cccd2a86d4334785 (diff)
PCI: disable mmio during bar sizing
It is a known issue that mmio decoding shall be disabled while doing PCI bar sizing. Host bridge and other devices (PCI PIC) shall be excluded for certain platforms. This patch mainly comes from Mathew Willcox's patch in http://kerneltrap.org/mailarchive/linux-kernel/2007/9/13/258969. A new flag bit "mmio_alway_on" is added to pci_dev with the intention that devices with their mmio decoding cannot be disabled during BAR sizing shall have this bit set, preferrablly in their quirks. Without this patch, Intel Moorestown platform graphics unit will be corrupted during bar sizing activities. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'include/linux/pci.h')
-rw-r--r--include/linux/pci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index f26fda76b87f..b1d17956a153 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -270,6 +270,8 @@ struct pci_dev {
unsigned int d1_support:1; /* Low power state D1 is supported */
unsigned int d2_support:1; /* Low power state D2 is supported */
unsigned int no_d1d2:1; /* Only allow D0 and D3 */
+ unsigned int mmio_always_on:1; /* disallow turning off io/mem
+ decoding during bar sizing */
unsigned int wakeup_prepared:1;
unsigned int d3_delay; /* D3->D0 transition time in ms */