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authorSøren Holm <sgh@sgh.dk>2011-09-02 22:55:37 +0200
committerGreg Kroah-Hartman <gregkh@suse.de>2011-09-22 15:50:38 -0700
commit06315348b16178e4c006e7892ef8e5e65f49c66a (patch)
tree5be7085d5584e0cafdd0a51188e1658ddadb410d /include/linux/serial_reg.h
parent2f7861de111bb8e33e6ab9f9607583c6fbc00132 (diff)
serial: Support the EFR-register of XR1715x uarts.
The EFR (Enhenced-Features-Register) is located at a different offset than the other devices supporting UART_CAP_EFR. This change add a special setup quick to set UPF_EXAR_EFR on the port. UPF_EXAR_EFR is then used to the port type to PORT_XR17D15X since it is for sure a XR17D15X uart. Signed-off-by: Søren Holm <sgh@sgh.dk> Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/linux/serial_reg.h')
-rw-r--r--include/linux/serial_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h
index c75bda37c18e..8ce70d76f836 100644
--- a/include/linux/serial_reg.h
+++ b/include/linux/serial_reg.h
@@ -152,6 +152,7 @@
* LCR=0xBF (or DLAB=1 for 16C660)
*/
#define UART_EFR 2 /* I/O: Extended Features Register */
+#define UART_XR_EFR 9 /* I/O: Extended Features Register (XR17D15x) */
#define UART_EFR_CTS 0x80 /* CTS flow control */
#define UART_EFR_RTS 0x40 /* RTS flow control */
#define UART_EFR_SCD 0x20 /* Special character detect */