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authorVille Syrjala <syrjala@sci.fi>2008-03-04 14:28:50 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-03-04 16:35:13 -0800
commit3149be50d3a31df095bcc83d752293da65a37f62 (patch)
treea40c9c16c47cbfe40bc2c16d1352ebccab5cc769 /include/linux/sm501-regs.h
parent245904a4ce08c48495b2fd6d6c317c26ddf2b57a (diff)
sm501: add support for the SM502 programmable PLL
SM502 has a programmable PLL which can provide the panel pixel clock instead of the 288MHz and 336MHz PLLs. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Ville Syrjala <syrjala@sci.fi> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/linux/sm501-regs.h')
-rw-r--r--include/linux/sm501-regs.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/sm501-regs.h b/include/linux/sm501-regs.h
index 64236b73c724..d53642d2d899 100644
--- a/include/linux/sm501-regs.h
+++ b/include/linux/sm501-regs.h
@@ -129,11 +129,14 @@
#define SM501_DEVICEID_SM501 (0x05010000)
#define SM501_DEVICEID_IDMASK (0xffff0000)
+#define SM501_DEVICEID_REVMASK (0x000000ff)
#define SM501_PLLCLOCK_COUNT (0x000064)
#define SM501_MISC_TIMING (0x000068)
#define SM501_CURRENT_SDRAM_CLOCK (0x00006C)
+#define SM501_PROGRAMMABLE_PLL_CONTROL (0x000074)
+
/* GPIO base */
#define SM501_GPIO (0x010000)
#define SM501_GPIO_DATA_LOW (0x00)