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authorOskar Schirmer <oskar@scara.com>2013-08-05 07:36:02 +0000
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2014-09-16 15:18:38 +0200
commitecece06ca136c5ed43495f53bc80dcc639cf513f (patch)
tree94193ccdc006badfc3815550c3daeca4ad94d791 /include/net/pkt_sched.h
parent6a8d3250ba31b2380111a2cd4410ecd84711ef1a (diff)
ASoC: sgtl5000: fix codec clock source transition to avoid clockless moment
Powering down PLL before switching to a mode that does not use it is a bad idea. It would cause the SGTL5000 be without internal clock supply, especially on the I2C interface, which would make subsequent access to it fail. Thus, in case of not using PLL any longer, first set the mode control, then power down PLL. Signed-off-by: Oskar Schirmer <oskar@scara.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit e06e4c2d530fd4995c41083009647263ccd77d3b)
Diffstat (limited to 'include/net/pkt_sched.h')
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