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authorRanjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>2019-11-18 13:50:29 -0600
committerRanjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>2019-11-21 11:47:23 -0600
commitaf481db76d0fcf18449cd47f548d5fae10bb161e (patch)
treeb067c40288014fe0cac61b56e3bcd0cfe4fa0535 /include/soc
parent995c205b831c782f8b84e8ec42fb0cbba1e5c917 (diff)
MLK-22998-3 soc:imx: Update SCFW API
Sync SCFW API to commit 6dcd0242ae Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Diffstat (limited to 'include/soc')
-rw-r--r--include/soc/imx8/sc/svc/irq/api.h87
-rw-r--r--include/soc/imx8/sc/svc/misc/api.h153
-rw-r--r--include/soc/imx8/sc/svc/pad/api.h125
-rw-r--r--include/soc/imx8/sc/svc/pm/api.h249
-rw-r--r--include/soc/imx8/sc/svc/rm/api.h122
-rw-r--r--include/soc/imx8/sc/svc/seco/api.h356
-rw-r--r--include/soc/imx8/sc/svc/timer/api.h54
-rw-r--r--include/soc/imx8/sc/types.h349
8 files changed, 843 insertions, 652 deletions
diff --git a/include/soc/imx8/sc/svc/irq/api.h b/include/soc/imx8/sc/svc/irq/api.h
index 4df7b9c735ca..a2c8b043c3f6 100644
--- a/include/soc/imx8/sc/svc/irq/api.h
+++ b/include/soc/imx8/sc/svc/irq/api.h
@@ -9,7 +9,7 @@
* Header file containing the public API for the System Controller (SC)
* Interrupt (IRQ) function.
*
- * @addtogroup IRQ_SVC (SVC) Interrupt Service
+ * @addtogroup IRQ_SVC IRQ: Interrupt Service
*
* Module for the Interrupt (IRQ) service.
*
@@ -25,79 +25,81 @@
/* Defines */
-#define SC_IRQ_NUM_GROUP 7U /* Number of groups */
+#define SC_IRQ_NUM_GROUP 7U /* Number of groups */
/*!
* @name Defines for sc_irq_group_t
*/
/*@{*/
-#define SC_IRQ_GROUP_TEMP 0U /* Temp interrupts */
-#define SC_IRQ_GROUP_WDOG 1U /* Watchdog interrupts */
-#define SC_IRQ_GROUP_RTC 2U /* RTC interrupts */
-#define SC_IRQ_GROUP_WAKE 3U /* Wakeup interrupts */
-#define SC_IRQ_GROUP_SYSCTR 4U /* System counter interrupts */
-#define SC_IRQ_GROUP_REBOOTED 5U /* Partition reboot complete */
-#define SC_IRQ_GROUP_REBOOT 6U /* Partition reboot starting */
+#define SC_IRQ_GROUP_TEMP 0U /* Temp interrupts */
+#define SC_IRQ_GROUP_WDOG 1U /* Watchdog interrupts */
+#define SC_IRQ_GROUP_RTC 2U /* RTC interrupts */
+#define SC_IRQ_GROUP_WAKE 3U /* Wakeup interrupts */
+#define SC_IRQ_GROUP_SYSCTR 4U /* System counter interrupts */
+#define SC_IRQ_GROUP_REBOOTED 5U /* Partition reboot complete */
+#define SC_IRQ_GROUP_REBOOT 6U /* Partition reboot starting */
/*@}*/
/*!
* @name Defines for sc_irq_temp_t
*/
/*@{*/
-#define SC_IRQ_TEMP_HIGH (1UL << 0U) /* Temp alarm interrupt */
-#define SC_IRQ_TEMP_CPU0_HIGH (1UL << 1U) /* CPU0 temp alarm interrupt */
-#define SC_IRQ_TEMP_CPU1_HIGH (1UL << 2U) /* CPU1 temp alarm interrupt */
-#define SC_IRQ_TEMP_GPU0_HIGH (1UL << 3U) /* GPU0 temp alarm interrupt */
-#define SC_IRQ_TEMP_GPU1_HIGH (1UL << 4U) /* GPU1 temp alarm interrupt */
-#define SC_IRQ_TEMP_DRC0_HIGH (1UL << 5U) /* DRC0 temp alarm interrupt */
-#define SC_IRQ_TEMP_DRC1_HIGH (1UL << 6U) /* DRC1 temp alarm interrupt */
-#define SC_IRQ_TEMP_VPU_HIGH (1UL << 7U) /* DRC1 temp alarm interrupt */
-#define SC_IRQ_TEMP_PMIC0_HIGH (1UL << 8U) /* PMIC0 temp alarm interrupt */
-#define SC_IRQ_TEMP_PMIC1_HIGH (1UL << 9U) /* PMIC1 temp alarm interrupt */
-#define SC_IRQ_TEMP_LOW (1UL << 10U) /* Temp alarm interrupt */
-#define SC_IRQ_TEMP_CPU0_LOW (1UL << 11U) /* CPU0 temp alarm interrupt */
-#define SC_IRQ_TEMP_CPU1_LOW (1UL << 12U) /* CPU1 temp alarm interrupt */
-#define SC_IRQ_TEMP_GPU0_LOW (1UL << 13U) /* GPU0 temp alarm interrupt */
-#define SC_IRQ_TEMP_GPU1_LOW (1UL << 14U) /* GPU1 temp alarm interrupt */
-#define SC_IRQ_TEMP_DRC0_LOW (1UL << 15U) /* DRC0 temp alarm interrupt */
-#define SC_IRQ_TEMP_DRC1_LOW (1UL << 16U) /* DRC1 temp alarm interrupt */
-#define SC_IRQ_TEMP_VPU_LOW (1UL << 17U) /* DRC1 temp alarm interrupt */
-#define SC_IRQ_TEMP_PMIC0_LOW (1UL << 18U) /* PMIC0 temp alarm interrupt */
-#define SC_IRQ_TEMP_PMIC1_LOW (1UL << 19U) /* PMIC1 temp alarm interrupt */
-#define SC_IRQ_TEMP_PMIC2_HIGH (1UL << 20U) /* PMIC2 temp alarm interrupt */
-#define SC_IRQ_TEMP_PMIC2_LOW (1UL << 21U) /* PMIC2 temp alarm interrupt */
+#define SC_IRQ_TEMP_HIGH (1UL << 0U) /* Temp alarm interrupt */
+#define SC_IRQ_TEMP_CPU0_HIGH (1UL << 1U) /* CPU0 temp alarm interrupt */
+#define SC_IRQ_TEMP_CPU1_HIGH (1UL << 2U) /* CPU1 temp alarm interrupt */
+#define SC_IRQ_TEMP_GPU0_HIGH (1UL << 3U) /* GPU0 temp alarm interrupt */
+#define SC_IRQ_TEMP_GPU1_HIGH (1UL << 4U) /* GPU1 temp alarm interrupt */
+#define SC_IRQ_TEMP_DRC0_HIGH (1UL << 5U) /* DRC0 temp alarm interrupt */
+#define SC_IRQ_TEMP_DRC1_HIGH (1UL << 6U) /* DRC1 temp alarm interrupt */
+#define SC_IRQ_TEMP_VPU_HIGH (1UL << 7U) /* DRC1 temp alarm interrupt */
+#define SC_IRQ_TEMP_PMIC0_HIGH (1UL << 8U) /* PMIC0 temp alarm interrupt */
+#define SC_IRQ_TEMP_PMIC1_HIGH (1UL << 9U) /* PMIC1 temp alarm interrupt */
+#define SC_IRQ_TEMP_LOW (1UL << 10U) /* Temp alarm interrupt */
+#define SC_IRQ_TEMP_CPU0_LOW (1UL << 11U) /* CPU0 temp alarm interrupt */
+#define SC_IRQ_TEMP_CPU1_LOW (1UL << 12U) /* CPU1 temp alarm interrupt */
+#define SC_IRQ_TEMP_GPU0_LOW (1UL << 13U) /* GPU0 temp alarm interrupt */
+#define SC_IRQ_TEMP_GPU1_LOW (1UL << 14U) /* GPU1 temp alarm interrupt */
+#define SC_IRQ_TEMP_DRC0_LOW (1UL << 15U) /* DRC0 temp alarm interrupt */
+#define SC_IRQ_TEMP_DRC1_LOW (1UL << 16U) /* DRC1 temp alarm interrupt */
+#define SC_IRQ_TEMP_VPU_LOW (1UL << 17U) /* DRC1 temp alarm interrupt */
+#define SC_IRQ_TEMP_PMIC0_LOW (1UL << 18U) /* PMIC0 temp alarm interrupt */
+#define SC_IRQ_TEMP_PMIC1_LOW (1UL << 19U) /* PMIC1 temp alarm interrupt */
+#define SC_IRQ_TEMP_PMIC2_HIGH (1UL << 20U) /* PMIC2 temp alarm interrupt */
+#define SC_IRQ_TEMP_PMIC2_LOW (1UL << 21U) /* PMIC2 temp alarm interrupt */
/*@}*/
/*!
* @name Defines for sc_irq_wdog_t
*/
/*@{*/
-#define SC_IRQ_WDOG (1U << 0U) /* Watchdog interrupt */
+#define SC_IRQ_WDOG (1U << 0U) /* Watchdog interrupt */
/*@}*/
/*!
* @name Defines for sc_irq_rtc_t
*/
/*@{*/
-#define SC_IRQ_RTC (1U << 0U) /* RTC interrupt */
+#define SC_IRQ_RTC (1U << 0U) /* RTC interrupt */
/*@}*/
/*!
* @name Defines for sc_irq_wake_t
*/
/*@{*/
-#define SC_IRQ_BUTTON (1U << 0U) /* Button interrupt */
-#define SC_IRQ_PAD (1U << 1U) /* Pad wakeup */
-#define SC_IRQ_USR1 (1U << 2U) /* User defined 1 */
-#define SC_IRQ_USR2 (1U << 3U) /* User defined 2 */
-#define SC_IRQ_BC_PAD (1U << 4U) /* Pad wakeup (broadcast to all partitions) */
+#define SC_IRQ_BUTTON (1U << 0U) /* Button interrupt */
+#define SC_IRQ_PAD (1U << 1U) /* Pad wakeup */
+#define SC_IRQ_USR1 (1U << 2U) /* User defined 1 */
+#define SC_IRQ_USR2 (1U << 3U) /* User defined 2 */
+#define SC_IRQ_BC_PAD (1U << 4U) /* Pad wakeup (broadcast to all partitions) */
+#define SC_IRQ_SW_WAKE (1U << 5U) /* Software requested wake */
+#define SC_IRQ_SECVIO (1U << 6U) /* Security violation */
/*@}*/
/*!
* @name Defines for sc_irq_sysctr_t
*/
/*@{*/
-#define SC_IRQ_SYSCTR (1U << 0U) /* SYSCTR interrupt */
+#define SC_IRQ_SYSCTR (1U << 0U) /* SYSCTR interrupt */
/*@}*/
/* Types */
@@ -145,7 +147,7 @@ typedef uint8_t sc_irq_wake_t;
* - SC_PARM if group invalid
*/
sc_err_t sc_irq_enable(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_irq_group_t group, uint32_t mask, sc_bool_t enable);
+ sc_irq_group_t group, uint32_t mask, sc_bool_t enable);
/*!
* This function returns the current interrupt status (regardless if
@@ -165,9 +167,8 @@ sc_err_t sc_irq_enable(sc_ipc_t ipc, sc_rsrc_t resource,
* currently masked.
*/
sc_err_t sc_irq_status(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_irq_group_t group, uint32_t *status);
+ sc_irq_group_t group, uint32_t *status);
-#endif /* SC_IRQ_API_H */
+#endif /* SC_IRQ_API_H */
/**@}*/
-
diff --git a/include/soc/imx8/sc/svc/misc/api.h b/include/soc/imx8/sc/svc/misc/api.h
index 9cbeb4da654e..35d876fa99f1 100644
--- a/include/soc/imx8/sc/svc/misc/api.h
+++ b/include/soc/imx8/sc/svc/misc/api.h
@@ -9,7 +9,7 @@
* Header file containing the public API for the System Controller (SC)
* Miscellaneous (MISC) function.
*
- * @addtogroup MISC_SVC (SVC) Miscellaneous Service
+ * @addtogroup MISC_SVC MISC: Miscellaneous Service
*
* Module for the Miscellaneous (MISC) service.
*
@@ -30,7 +30,7 @@
* @name Defines for type widths
*/
/*@{*/
-#define SC_MISC_DMA_GRP_W 5U /* Width of sc_misc_dma_group_t */
+#define SC_MISC_DMA_GRP_W 5U /* Width of sc_misc_dma_group_t */
/*@}*/
/*! Max DMA channel priority group */
@@ -40,40 +40,28 @@
* @name Defines for sc_misc_boot_status_t
*/
/*@{*/
-#define SC_MISC_BOOT_STATUS_SUCCESS 0U /* Success */
-#define SC_MISC_BOOT_STATUS_SECURITY 1U /* Security violation */
+#define SC_MISC_BOOT_STATUS_SUCCESS 0U /* Success */
+#define SC_MISC_BOOT_STATUS_SECURITY 1U /* Security violation */
/*@}*/
/*!
* @name Defines for sc_misc_temp_t
*/
/*@{*/
-#define SC_MISC_TEMP 0U /* Temp sensor */
-#define SC_MISC_TEMP_HIGH 1U /* Temp high alarm */
-#define SC_MISC_TEMP_LOW 2U /* Temp low alarm */
-/*@}*/
-
-/*!
- * @name Defines for sc_misc_seco_auth_cmd_t
- */
-/*@{*/
-#define SC_MISC_AUTH_CONTAINER 0U /* Authenticate container */
-#define SC_MISC_VERIFY_IMAGE 1U /* Verify image */
-#define SC_MISC_REL_CONTAINER 2U /* Release container */
-#define SC_MISC_SECO_AUTH_SECO_FW 3U /* SECO Firmware */
-#define SC_MISC_SECO_AUTH_HDMI_TX_FW 4U /* HDMI TX Firmware */
-#define SC_MISC_SECO_AUTH_HDMI_RX_FW 5U /* HDMI RX Firmware */
+#define SC_MISC_TEMP 0U /* Temp sensor */
+#define SC_MISC_TEMP_HIGH 1U /* Temp high alarm */
+#define SC_MISC_TEMP_LOW 2U /* Temp low alarm */
/*@}*/
/*!
* @name Defines for sc_misc_bt_t
*/
/*@{*/
-#define SC_MISC_BT_PRIMARY 0U /* Primary boot */
-#define SC_MISC_BT_SECONDARY 1U /* Secondary boot */
-#define SC_MISC_BT_RECOVERY 2U /* Recovery boot */
-#define SC_MISC_BT_MANUFACTURE 3U /* Manufacture boot */
-#define SC_MISC_BT_SERIAL 4U /* Serial boot */
+#define SC_MISC_BT_PRIMARY 0U /* Primary boot */
+#define SC_MISC_BT_SECONDARY 1U /* Secondary boot */
+#define SC_MISC_BT_RECOVERY 2U /* Recovery boot */
+#define SC_MISC_BT_MANUFACTURE 3U /* Manufacture boot */
+#define SC_MISC_BT_SERIAL 4U /* Serial boot */
/*@}*/
/* Types */
@@ -89,11 +77,6 @@ typedef uint8_t sc_misc_dma_group_t;
typedef uint8_t sc_misc_boot_status_t;
/*!
- * This type is used to issue SECO authenticate commands.
- */
-typedef uint8_t sc_misc_seco_auth_cmd_t;
-
-/*!
* This type is used report boot status.
*/
typedef uint8_t sc_misc_temp_t;
@@ -128,7 +111,7 @@ typedef uint8_t sc_misc_bt_t;
* Refer to the [Control List](@ref CONTROLS) for valid control values.
*/
sc_err_t sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_ctrl_t ctrl, uint32_t val);
+ sc_ctrl_t ctrl, uint32_t val);
/*!
* This function gets a miscellaneous control value.
@@ -148,7 +131,7 @@ sc_err_t sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
* Refer to the [Control List](@ref CONTROLS) for valid control values.
*/
sc_err_t sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_ctrl_t ctrl, uint32_t *val);
+ sc_ctrl_t ctrl, uint32_t *val);
/* @} */
@@ -176,7 +159,7 @@ sc_err_t sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource,
* Default is the max priority group for the parent partition of \a pt.
*/
sc_err_t sc_misc_set_max_dma_group(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_misc_dma_group_t max);
+ sc_misc_dma_group_t max);
/*!
* This function configures the priority group for a DMA channel.
@@ -197,88 +180,7 @@ sc_err_t sc_misc_set_max_dma_group(sc_ipc_t ipc, sc_rm_pt_t pt,
* sc_misc_set_max_dma_group().
*/
sc_err_t sc_misc_set_dma_group(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_misc_dma_group_t group);
-
-/* @} */
-
-/*!
- * @name Security Functions
- * @{
- */
-
-/*!
- * @deprecated Use sc_seco_image_load() instead.
- */
-sc_err_t sc_misc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src,
- sc_faddr_t addr_dst, uint32_t len, sc_bool_t fw);
-
-/*!
- * @deprecated Use sc_seco_authenticate() instead.
- */
-sc_err_t sc_misc_seco_authenticate(sc_ipc_t ipc,
- sc_misc_seco_auth_cmd_t cmd, sc_faddr_t addr);
-
-/*!
- * @deprecated Use sc_seco_fuse_write() instead.
- */
-sc_err_t sc_misc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr);
-
-/*!
- * @deprecated Use sc_seco_enable_debug() instead.
- */
-sc_err_t sc_misc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr);
-
-/*!
- * @deprecated Use sc_seco_forward_lifecycle() instead.
- */
-sc_err_t sc_misc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t change);
-
-/*!
- * @deprecated Use sc_seco_return_lifecycle() instead.
- */
-sc_err_t sc_misc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr);
-
-/*!
- * @deprecated Use sc_seco_build_info() instead.
- */
-void sc_misc_seco_build_info(sc_ipc_t ipc, uint32_t *version,
- uint32_t *commit);
-
-/*!
- * @deprecated Use sc_seco_chip_info() instead.
- */
-sc_err_t sc_misc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc,
- uint16_t *monotonic, uint32_t *uid_l, uint32_t *uid_h);
-
-/*!
- * @deprecated Use sc_seco_attest_mode() instead.
- */
-sc_err_t sc_misc_seco_attest_mode(sc_ipc_t ipc, uint32_t mode);
-
-/*!
- * @deprecated Use sc_seco_attest() instead.
- */
-sc_err_t sc_misc_seco_attest(sc_ipc_t ipc, uint64_t nonce);
-
-/*!
- * @deprecated Use sc_seco_get_attest_pkey() instead.
- */
-sc_err_t sc_misc_seco_get_attest_pkey(sc_ipc_t ipc, sc_faddr_t addr);
-
-/*!
- * @deprecated Use sc_seco_get_attest_sign() instead.
- */
-sc_err_t sc_misc_seco_get_attest_sign(sc_ipc_t ipc, sc_faddr_t addr);
-
-/*!
- * @deprecated Use sc_seco_attest_verify() instead.
- */
-sc_err_t sc_misc_seco_attest_verify(sc_ipc_t ipc, sc_faddr_t addr);
-
-/*!
- * @deprecated Use sc_seco_commit() instead.
- */
-sc_err_t sc_misc_seco_commit(sc_ipc_t ipc, uint32_t *info);
+ sc_misc_dma_group_t group);
/* @} */
@@ -315,8 +217,7 @@ sc_err_t sc_misc_waveform_capture(sc_ipc_t ipc, sc_bool_t enable);
* @param[out] build pointer to return build number
* @param[out] commit pointer to return commit ID (git SHA-1)
*/
-void sc_misc_build_info(sc_ipc_t ipc, uint32_t *build,
- uint32_t *commit);
+void sc_misc_build_info(sc_ipc_t ipc, uint32_t *build, uint32_t *commit);
/*!
* This function is used to return the SCFW API versions.
@@ -333,7 +234,7 @@ void sc_misc_build_info(sc_ipc_t ipc, uint32_t *build,
* Note a major version difference indicates a break in compatibility.
*/
void sc_misc_api_ver(sc_ipc_t ipc, uint16_t *cl_maj,
- uint16_t *cl_min, uint16_t *sv_maj, uint16_t *sv_min);
+ uint16_t *cl_min, uint16_t *sv_maj, uint16_t *sv_min);
/*!
* This function is used to return the device's unique ID.
@@ -342,8 +243,7 @@ void sc_misc_api_ver(sc_ipc_t ipc, uint16_t *cl_maj,
* @param[out] id_l pointer to return lower 32-bit of ID [31:0]
* @param[out] id_h pointer to return upper 32-bits of ID [63:32]
*/
-void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l,
- uint32_t *id_h);
+void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l, uint32_t *id_h);
/* @} */
@@ -373,7 +273,8 @@ void sc_misc_unique_id(sc_ipc_t ipc, uint32_t *id_l,
* FISType and PM_Port.
*/
sc_err_t sc_misc_set_ari(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rsrc_t resource_mst, uint16_t ari, sc_bool_t enable);
+ sc_rsrc_t resource_mst, uint16_t ari,
+ sc_bool_t enable);
/*!
* This function reports boot status.
@@ -433,7 +334,7 @@ sc_err_t sc_misc_otp_fuse_read(sc_ipc_t ipc, uint32_t word, uint32_t *val);
* The command is passed as is to SECO. SECO uses part of the
* \a word parameter to indicate if the fuse should be locked
* after programming. See the "Write common fuse" section of
- * the Security Reference Manual (SRM) for more info.
+ * the SECO API Reference Guide for more info.
*
* @return Returns and error code (SC_ERR_NONE = success).
*
@@ -466,7 +367,7 @@ sc_err_t sc_misc_otp_fuse_write(sc_ipc_t ipc, uint32_t word, uint32_t val);
* - SC_ERR_NOPOWER if power domain of resource not powered
*/
sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_misc_temp_t temp, int16_t celsius, int8_t tenths);
+ sc_misc_temp_t temp, int16_t celsius, int8_t tenths);
/*!
* This function gets a temp sensor value.
@@ -485,7 +386,8 @@ sc_err_t sc_misc_set_temp(sc_ipc_t ipc, sc_rsrc_t resource,
* - SC_ERR_NOPOWER if power domain of resource not powered
*/
sc_err_t sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_misc_temp_t temp, int16_t *celsius, int8_t *tenths);
+ sc_misc_temp_t temp, int16_t *celsius,
+ int8_t *tenths);
/*!
* This function returns the boot device.
@@ -552,11 +454,10 @@ sc_err_t sc_misc_rompatch_checksum(sc_ipc_t ipc, uint32_t *checksum);
* @return Returns and error code (SC_ERR_NONE = success).
*/
sc_err_t sc_misc_board_ioctl(sc_ipc_t ipc, uint32_t *parm1,
- uint32_t *parm2, uint32_t *parm3);
+ uint32_t *parm2, uint32_t *parm3);
/* @} */
-#endif /* SC_MISC_API_H */
+#endif /* SC_MISC_API_H */
/**@}*/
-
diff --git a/include/soc/imx8/sc/svc/pad/api.h b/include/soc/imx8/sc/svc/pad/api.h
index 2bcf109ea0a3..1baaeea22737 100644
--- a/include/soc/imx8/sc/svc/pad/api.h
+++ b/include/soc/imx8/sc/svc/pad/api.h
@@ -9,7 +9,7 @@
* Header file containing the public API for the System Controller (SC)
* Pad Control (PAD) function.
*
- * @addtogroup PAD_SVC (SVC) Pad Service
+ * @addtogroup PAD_SVC PAD: Pad Service
*
* Module for the Pad Control (PAD) service.
*
@@ -70,79 +70,79 @@
* @name Defines for type widths
*/
/*@{*/
-#define SC_PAD_MUX_W 3U /* Width of mux parameter */
+#define SC_PAD_MUX_W 3U /* Width of mux parameter */
/*@}*/
/*!
* @name Defines for sc_pad_config_t
*/
/*@{*/
-#define SC_PAD_CONFIG_NORMAL 0U /* Normal */
-#define SC_PAD_CONFIG_OD 1U /* Open Drain */
-#define SC_PAD_CONFIG_OD_IN 2U /* Open Drain and input */
-#define SC_PAD_CONFIG_OUT_IN 3U /* Output and input */
+#define SC_PAD_CONFIG_NORMAL 0U /* Normal */
+#define SC_PAD_CONFIG_OD 1U /* Open Drain */
+#define SC_PAD_CONFIG_OD_IN 2U /* Open Drain and input */
+#define SC_PAD_CONFIG_OUT_IN 3U /* Output and input */
/*@}*/
/*!
* @name Defines for sc_pad_iso_t
*/
/*@{*/
-#define SC_PAD_ISO_OFF 0U /* ISO latch is transparent */
-#define SC_PAD_ISO_EARLY 1U /* Follow EARLY_ISO */
-#define SC_PAD_ISO_LATE 2U /* Follow LATE_ISO */
-#define SC_PAD_ISO_ON 3U /* ISO latched data is held */
+#define SC_PAD_ISO_OFF 0U /* ISO latch is transparent */
+#define SC_PAD_ISO_EARLY 1U /* Follow EARLY_ISO */
+#define SC_PAD_ISO_LATE 2U /* Follow LATE_ISO */
+#define SC_PAD_ISO_ON 3U /* ISO latched data is held */
/*@}*/
/*!
* @name Defines for sc_pad_28fdsoi_dse_t
*/
/*@{*/
-#define SC_PAD_28FDSOI_DSE_18V_1MA 0U /* Drive strength of 1mA for 1.8v */
-#define SC_PAD_28FDSOI_DSE_18V_2MA 1U /* Drive strength of 2mA for 1.8v */
-#define SC_PAD_28FDSOI_DSE_18V_4MA 2U /* Drive strength of 4mA for 1.8v */
-#define SC_PAD_28FDSOI_DSE_18V_6MA 3U /* Drive strength of 6mA for 1.8v */
-#define SC_PAD_28FDSOI_DSE_18V_8MA 4U /* Drive strength of 8mA for 1.8v */
-#define SC_PAD_28FDSOI_DSE_18V_10MA 5U /* Drive strength of 10mA for 1.8v */
-#define SC_PAD_28FDSOI_DSE_18V_12MA 6U /* Drive strength of 12mA for 1.8v */
-#define SC_PAD_28FDSOI_DSE_18V_HS 7U /* High-speed drive strength for 1.8v */
-#define SC_PAD_28FDSOI_DSE_33V_2MA 0U /* Drive strength of 2mA for 3.3v */
-#define SC_PAD_28FDSOI_DSE_33V_4MA 1U /* Drive strength of 4mA for 3.3v */
-#define SC_PAD_28FDSOI_DSE_33V_8MA 2U /* Drive strength of 8mA for 3.3v */
-#define SC_PAD_28FDSOI_DSE_33V_12MA 3U /* Drive strength of 12mA for 3.3v */
-#define SC_PAD_28FDSOI_DSE_DV_HIGH 0U /* High drive strength for dual volt */
-#define SC_PAD_28FDSOI_DSE_DV_LOW 1U /* Low drive strength for dual volt */
+#define SC_PAD_28FDSOI_DSE_18V_1MA 0U /* Drive strength of 1mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_2MA 1U /* Drive strength of 2mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_4MA 2U /* Drive strength of 4mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_6MA 3U /* Drive strength of 6mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_8MA 4U /* Drive strength of 8mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_10MA 5U /* Drive strength of 10mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_12MA 6U /* Drive strength of 12mA for 1.8v */
+#define SC_PAD_28FDSOI_DSE_18V_HS 7U /* High-speed drive strength for 1.8v */
+#define SC_PAD_28FDSOI_DSE_33V_2MA 0U /* Drive strength of 2mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_4MA 1U /* Drive strength of 4mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_8MA 2U /* Drive strength of 8mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_33V_12MA 3U /* Drive strength of 12mA for 3.3v */
+#define SC_PAD_28FDSOI_DSE_DV_HIGH 0U /* High drive strength for dual volt */
+#define SC_PAD_28FDSOI_DSE_DV_LOW 1U /* Low drive strength for dual volt */
/*@}*/
/*!
* @name Defines for sc_pad_28fdsoi_ps_t
*/
/*@{*/
-#define SC_PAD_28FDSOI_PS_KEEPER 0U /* Bus-keeper (only valid for 1.8v) */
-#define SC_PAD_28FDSOI_PS_PU 1U /* Pull-up */
-#define SC_PAD_28FDSOI_PS_PD 2U /* Pull-down */
-#define SC_PAD_28FDSOI_PS_NONE 3U /* No pull (disabled) */
+#define SC_PAD_28FDSOI_PS_KEEPER 0U /* Bus-keeper (only valid for 1.8v) */
+#define SC_PAD_28FDSOI_PS_PU 1U /* Pull-up */
+#define SC_PAD_28FDSOI_PS_PD 2U /* Pull-down */
+#define SC_PAD_28FDSOI_PS_NONE 3U /* No pull (disabled) */
/*@}*/
/*!
* @name Defines for sc_pad_28fdsoi_pus_t
*/
/*@{*/
-#define SC_PAD_28FDSOI_PUS_30K_PD 0U /* 30K pull-down */
-#define SC_PAD_28FDSOI_PUS_100K_PU 1U /* 100K pull-up */
-#define SC_PAD_28FDSOI_PUS_3K_PU 2U /* 3K pull-up */
-#define SC_PAD_28FDSOI_PUS_30K_PU 3U /* 30K pull-up */
+#define SC_PAD_28FDSOI_PUS_30K_PD 0U /* 30K pull-down */
+#define SC_PAD_28FDSOI_PUS_100K_PU 1U /* 100K pull-up */
+#define SC_PAD_28FDSOI_PUS_3K_PU 2U /* 3K pull-up */
+#define SC_PAD_28FDSOI_PUS_30K_PU 3U /* 30K pull-up */
/*@}*/
/*!
* @name Defines for sc_pad_wakeup_t
*/
/*@{*/
-#define SC_PAD_WAKEUP_OFF 0U /* Off */
-#define SC_PAD_WAKEUP_CLEAR 1U /* Clears pending flag */
-#define SC_PAD_WAKEUP_LOW_LVL 4U /* Low level */
-#define SC_PAD_WAKEUP_FALL_EDGE 5U /* Falling edge */
-#define SC_PAD_WAKEUP_RISE_EDGE 6U /* Rising edge */
-#define SC_PAD_WAKEUP_HIGH_LVL 7U /* High-level */
+#define SC_PAD_WAKEUP_OFF 0U /* Off */
+#define SC_PAD_WAKEUP_CLEAR 1U /* Clears pending flag */
+#define SC_PAD_WAKEUP_LOW_LVL 4U /* Low level */
+#define SC_PAD_WAKEUP_FALL_EDGE 5U /* Falling edge */
+#define SC_PAD_WAKEUP_RISE_EDGE 6U /* Rising edge */
+#define SC_PAD_WAKEUP_HIGH_LVL 7U /* High-level */
/*@}*/
/* Types */
@@ -216,7 +216,7 @@ typedef uint8_t sc_pad_wakeup_t;
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t mux, sc_pad_config_t config, sc_pad_iso_t iso);
+ uint8_t mux, sc_pad_config_t config, sc_pad_iso_t iso);
/*!
* This function gets the mux settings for a pad. This includes
@@ -237,7 +237,8 @@ sc_err_t sc_pad_set_mux(sc_ipc_t ipc, sc_pad_t pad,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_get_mux(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t *mux, sc_pad_config_t *config, sc_pad_iso_t *iso);
+ uint8_t *mux, sc_pad_config_t *config,
+ sc_pad_iso_t *iso);
/*!
* This function configures the general purpose pad control. This
@@ -294,8 +295,7 @@ sc_err_t sc_pad_get_gp(sc_ipc_t ipc, sc_pad_t pad, uint32_t *ctrl);
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
-sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_wakeup_t wakeup);
+sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t wakeup);
/*!
* This function gets the wakeup mode of a pad.
@@ -312,8 +312,7 @@ sc_err_t sc_pad_set_wakeup(sc_ipc_t ipc, sc_pad_t pad,
*
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
-sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_wakeup_t *wakeup);
+sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad, sc_pad_wakeup_t *wakeup);
/*!
* This function configures a pad.
@@ -341,8 +340,8 @@ sc_err_t sc_pad_get_wakeup(sc_ipc_t ipc, sc_pad_t pad,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux,
- sc_pad_config_t config, sc_pad_iso_t iso, uint32_t ctrl,
- sc_pad_wakeup_t wakeup);
+ sc_pad_config_t config, sc_pad_iso_t iso, uint32_t ctrl,
+ sc_pad_wakeup_t wakeup);
/*!
* This function gets a pad's config.
@@ -367,8 +366,8 @@ sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux,
- sc_pad_config_t *config, sc_pad_iso_t *iso, uint32_t *ctrl,
- sc_pad_wakeup_t *wakeup);
+ sc_pad_config_t *config, sc_pad_iso_t *iso,
+ uint32_t *ctrl, sc_pad_wakeup_t *wakeup);
/* @} */
@@ -438,7 +437,8 @@ sc_err_t sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val);
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28fdsoi_dse_t dse, sc_pad_28fdsoi_ps_t ps);
+ sc_pad_28fdsoi_dse_t dse,
+ sc_pad_28fdsoi_ps_t ps);
/*!
* This function gets the pad control specific to 28FDSOI.
@@ -458,7 +458,8 @@ sc_err_t sc_pad_set_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28fdsoi_dse_t *dse, sc_pad_28fdsoi_ps_t *ps);
+ sc_pad_28fdsoi_dse_t *dse,
+ sc_pad_28fdsoi_ps_t *ps);
/*!
* This function configures the pad control specific to 28FDSOI.
@@ -481,8 +482,9 @@ sc_err_t sc_pad_get_gp_28fdsoi(sc_ipc_t ipc, sc_pad_t pad,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28fdsoi_dse_t dse, sc_bool_t hys, sc_pad_28fdsoi_pus_t pus,
- sc_bool_t pke, sc_bool_t pue);
+ sc_pad_28fdsoi_dse_t dse, sc_bool_t hys,
+ sc_pad_28fdsoi_pus_t pus, sc_bool_t pke,
+ sc_bool_t pue);
/*!
* This function gets the pad control specific to 28FDSOI.
@@ -505,8 +507,9 @@ sc_err_t sc_pad_set_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
- sc_pad_28fdsoi_dse_t *dse, sc_bool_t *hys, sc_pad_28fdsoi_pus_t *pus,
- sc_bool_t *pke, sc_bool_t *pue);
+ sc_pad_28fdsoi_dse_t *dse, sc_bool_t *hys,
+ sc_pad_28fdsoi_pus_t *pus, sc_bool_t *pke,
+ sc_bool_t *pue);
/*!
* This function configures the compensation control specific to 28FDSOI.
@@ -533,8 +536,9 @@ sc_err_t sc_pad_get_gp_28fdsoi_hsic(sc_ipc_t ipc, sc_pad_t pad,
* operation (e.g. some Ethernet pads).
*/
sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t compen, sc_bool_t fastfrz, uint8_t rasrcp, uint8_t rasrcn,
- sc_bool_t nasrc_sel, sc_bool_t psw_ovr);
+ uint8_t compen, sc_bool_t fastfrz,
+ uint8_t rasrcp, uint8_t rasrcn,
+ sc_bool_t nasrc_sel, sc_bool_t psw_ovr);
/*!
* This function gets the compensation control specific to 28FDSOI.
@@ -560,12 +564,13 @@ sc_err_t sc_pad_set_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
* Refer to the SoC [Pad List](@ref PADS) for valid pad values.
*/
sc_err_t sc_pad_get_gp_28fdsoi_comp(sc_ipc_t ipc, sc_pad_t pad,
- uint8_t *compen, sc_bool_t *fastfrz, uint8_t *rasrcp, uint8_t *rasrcn,
- sc_bool_t *nasrc_sel, sc_bool_t *compok, uint8_t *nasrc, sc_bool_t *psw_ovr);
+ uint8_t *compen, sc_bool_t *fastfrz,
+ uint8_t *rasrcp, uint8_t *rasrcn,
+ sc_bool_t *nasrc_sel, sc_bool_t *compok,
+ uint8_t *nasrc, sc_bool_t *psw_ovr);
/* @} */
-#endif /* SC_PAD_API_H */
+#endif /* SC_PAD_API_H */
/**@}*/
-
diff --git a/include/soc/imx8/sc/svc/pm/api.h b/include/soc/imx8/sc/svc/pm/api.h
index 608520eeb491..34990fac3ee5 100644
--- a/include/soc/imx8/sc/svc/pm/api.h
+++ b/include/soc/imx8/sc/svc/pm/api.h
@@ -10,7 +10,7 @@
* Power Management (PM) function. This includes functions for power state
* control, clock control, reset control, and wake-up event control.
*
- * @addtogroup PM_SVC (SVC) Power Management Service
+ * @addtogroup PM_SVC PM: Power Management Service
*
* Module for the Power Management (PM) service.
*
@@ -33,10 +33,10 @@
* @name Defines for type widths
*/
/*@{*/
-#define SC_PM_POWER_MODE_W 2U /* Width of sc_pm_power_mode_t */
-#define SC_PM_CLOCK_MODE_W 3U /* Width of sc_pm_clock_mode_t */
-#define SC_PM_RESET_TYPE_W 2U /* Width of sc_pm_reset_type_t */
-#define SC_PM_RESET_REASON_W 4U /* Width of sc_pm_reset_reason_t */
+#define SC_PM_POWER_MODE_W 2U /* Width of sc_pm_power_mode_t */
+#define SC_PM_CLOCK_MODE_W 3U /* Width of sc_pm_clock_mode_t */
+#define SC_PM_RESET_TYPE_W 2U /* Width of sc_pm_reset_type_t */
+#define SC_PM_RESET_REASON_W 4U /* Width of sc_pm_reset_reason_t */
/*@}*/
/*!
@@ -49,108 +49,108 @@
* @name Defines for ALL parameters
*/
/*@{*/
-#define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /* All clocks */
+#define SC_PM_CLK_ALL ((sc_pm_clk_t) UINT8_MAX) /* All clocks */
/*@}*/
/*!
* @name Defines for sc_pm_power_mode_t
*/
/*@{*/
-#define SC_PM_PW_MODE_OFF 0U /* Power off */
-#define SC_PM_PW_MODE_STBY 1U /* Power in standby */
-#define SC_PM_PW_MODE_LP 2U /* Power in low-power */
-#define SC_PM_PW_MODE_ON 3U /* Power on */
+#define SC_PM_PW_MODE_OFF 0U /* Power off */
+#define SC_PM_PW_MODE_STBY 1U /* Power in standby */
+#define SC_PM_PW_MODE_LP 2U /* Power in low-power */
+#define SC_PM_PW_MODE_ON 3U /* Power on */
/*@}*/
/*!
* @name Defines for sc_pm_clk_t
*/
/*@{*/
-#define SC_PM_CLK_SLV_BUS 0U /* Slave bus clock */
-#define SC_PM_CLK_MST_BUS 1U /* Master bus clock */
-#define SC_PM_CLK_PER 2U /* Peripheral clock */
-#define SC_PM_CLK_PHY 3U /* Phy clock */
-#define SC_PM_CLK_MISC 4U /* Misc clock */
-#define SC_PM_CLK_MISC0 0U /* Misc 0 clock */
-#define SC_PM_CLK_MISC1 1U /* Misc 1 clock */
-#define SC_PM_CLK_MISC2 2U /* Misc 2 clock */
-#define SC_PM_CLK_MISC3 3U /* Misc 3 clock */
-#define SC_PM_CLK_MISC4 4U /* Misc 4 clock */
-#define SC_PM_CLK_CPU 2U /* CPU clock */
-#define SC_PM_CLK_PLL 4U /* PLL */
-#define SC_PM_CLK_BYPASS 4U /* Bypass clock */
+#define SC_PM_CLK_SLV_BUS 0U /* Slave bus clock */
+#define SC_PM_CLK_MST_BUS 1U /* Master bus clock */
+#define SC_PM_CLK_PER 2U /* Peripheral clock */
+#define SC_PM_CLK_PHY 3U /* Phy clock */
+#define SC_PM_CLK_MISC 4U /* Misc clock */
+#define SC_PM_CLK_MISC0 0U /* Misc 0 clock */
+#define SC_PM_CLK_MISC1 1U /* Misc 1 clock */
+#define SC_PM_CLK_MISC2 2U /* Misc 2 clock */
+#define SC_PM_CLK_MISC3 3U /* Misc 3 clock */
+#define SC_PM_CLK_MISC4 4U /* Misc 4 clock */
+#define SC_PM_CLK_CPU 2U /* CPU clock */
+#define SC_PM_CLK_PLL 4U /* PLL */
+#define SC_PM_CLK_BYPASS 4U /* Bypass clock */
/*@}*/
/*!
* @name Defines for sc_pm_clk_mode_t
*/
/*@{*/
-#define SC_PM_CLK_MODE_ROM_INIT 0U /* Clock is initialized by ROM. */
-#define SC_PM_CLK_MODE_OFF 1U /* Clock is disabled */
-#define SC_PM_CLK_MODE_ON 2U /* Clock is enabled. */
-#define SC_PM_CLK_MODE_AUTOGATE_SW 3U /* Clock is in SW autogate mode */
-#define SC_PM_CLK_MODE_AUTOGATE_HW 4U /* Clock is in HW autogate mode */
-#define SC_PM_CLK_MODE_AUTOGATE_SW_HW 5U /* Clock is in SW-HW autogate mode */
+#define SC_PM_CLK_MODE_ROM_INIT 0U /* Clock is initialized by ROM */
+#define SC_PM_CLK_MODE_OFF 1U /* Clock is disabled */
+#define SC_PM_CLK_MODE_ON 2U /* Clock is enabled */
+#define SC_PM_CLK_MODE_AUTOGATE_SW 3U /* Clock is in SW autogate mode */
+#define SC_PM_CLK_MODE_AUTOGATE_HW 4U /* Clock is in HW autogate mode */
+#define SC_PM_CLK_MODE_AUTOGATE_SW_HW 5U /* Clock is in SW-HW autogate mode */
/*@}*/
/*!
* @name Defines for sc_pm_clk_parent_t
*/
/*@{*/
-#define SC_PM_PARENT_XTAL 0U /* Parent is XTAL. */
-#define SC_PM_PARENT_PLL0 1U /* Parent is PLL0 */
-#define SC_PM_PARENT_PLL1 2U /* Parent is PLL1 or PLL0/2 */
-#define SC_PM_PARENT_PLL2 3U /* Parent in PLL2 or PLL0/4 */
-#define SC_PM_PARENT_BYPS 4U /* Parent is a bypass clock. */
+#define SC_PM_PARENT_XTAL 0U /* Parent is XTAL */
+#define SC_PM_PARENT_PLL0 1U /* Parent is PLL0 */
+#define SC_PM_PARENT_PLL1 2U /* Parent is PLL1 or PLL0/2 */
+#define SC_PM_PARENT_PLL2 3U /* Parent in PLL2 or PLL0/4 */
+#define SC_PM_PARENT_BYPS 4U /* Parent is a bypass clock. */
/*@}*/
/*!
* @name Defines for sc_pm_reset_type_t
*/
/*@{*/
-#define SC_PM_RESET_TYPE_COLD 0U /* Cold reset */
-#define SC_PM_RESET_TYPE_WARM 1U /* Warm reset */
-#define SC_PM_RESET_TYPE_BOARD 2U /* Board reset */
+#define SC_PM_RESET_TYPE_COLD 0U /* Cold reset */
+#define SC_PM_RESET_TYPE_WARM 1U /* Warm reset */
+#define SC_PM_RESET_TYPE_BOARD 2U /* Board reset */
/*@}*/
/*!
* @name Defines for sc_pm_reset_reason_t
*/
/*@{*/
-#define SC_PM_RESET_REASON_POR 0U /* Power on reset */
-#define SC_PM_RESET_REASON_JTAG 1U /* JTAG reset */
-#define SC_PM_RESET_REASON_SW 2U /* Software reset */
-#define SC_PM_RESET_REASON_WDOG 3U /* Partition watchdog reset */
-#define SC_PM_RESET_REASON_LOCKUP 4U /* SCU lockup reset */
-#define SC_PM_RESET_REASON_SNVS 5U /* SNVS reset */
-#define SC_PM_RESET_REASON_TEMP 6U /* Temp panic reset */
-#define SC_PM_RESET_REASON_MSI 7U /* MSI reset */
-#define SC_PM_RESET_REASON_UECC 8U /* ECC reset */
-#define SC_PM_RESET_REASON_SCFW_WDOG 9U /* SCFW watchdog reset */
-#define SC_PM_RESET_REASON_ROM_WDOG 10U /* SCU ROM watchdog reset */
-#define SC_PM_RESET_REASON_SECO 11U /* SECO reset */
-#define SC_PM_RESET_REASON_SCFW_FAULT 12U /* SCFW fault reset */
+#define SC_PM_RESET_REASON_POR 0U /* Power on reset */
+#define SC_PM_RESET_REASON_JTAG 1U /* JTAG reset */
+#define SC_PM_RESET_REASON_SW 2U /* Software reset */
+#define SC_PM_RESET_REASON_WDOG 3U /* Partition watchdog reset */
+#define SC_PM_RESET_REASON_LOCKUP 4U /* SCU lockup reset */
+#define SC_PM_RESET_REASON_SNVS 5U /* SNVS reset */
+#define SC_PM_RESET_REASON_TEMP 6U /* Temp panic reset */
+#define SC_PM_RESET_REASON_MSI 7U /* MSI reset */
+#define SC_PM_RESET_REASON_UECC 8U /* ECC reset */
+#define SC_PM_RESET_REASON_SCFW_WDOG 9U /* SCFW watchdog reset */
+#define SC_PM_RESET_REASON_ROM_WDOG 10U /* SCU ROM watchdog reset */
+#define SC_PM_RESET_REASON_SECO 11U /* SECO reset */
+#define SC_PM_RESET_REASON_SCFW_FAULT 12U /* SCFW fault reset */
/*@}*/
/*!
* @name Defines for sc_pm_sys_if_t
*/
/*@{*/
-#define SC_PM_SYS_IF_INTERCONNECT 0U /* System interconnect */
-#define SC_PM_SYS_IF_MU 1U /* AP -> SCU message units */
-#define SC_PM_SYS_IF_OCMEM 2U /* On-chip memory (ROM/OCRAM) */
-#define SC_PM_SYS_IF_DDR 3U /* DDR memory */
+#define SC_PM_SYS_IF_INTERCONNECT 0U /* System interconnect */
+#define SC_PM_SYS_IF_MU 1U /* AP -> SCU message units */
+#define SC_PM_SYS_IF_OCMEM 2U /* On-chip memory (ROM/OCRAM) */
+#define SC_PM_SYS_IF_DDR 3U /* DDR memory */
/*@}*/
/*!
* @name Defines for sc_pm_wake_src_t
*/
/*@{*/
-#define SC_PM_WAKE_SRC_NONE 0U /* No wake source, used for self-kill */
-#define SC_PM_WAKE_SRC_SCU 1U /* Wakeup from SCU to resume CPU (IRQSTEER & GIC powered down) */
-#define SC_PM_WAKE_SRC_IRQSTEER 2U /* Wakeup from IRQSTEER to resume CPU (GIC powered down) */
-#define SC_PM_WAKE_SRC_IRQSTEER_GIC 3U /* Wakeup from IRQSTEER+GIC to wake CPU (GIC clock gated) */
-#define SC_PM_WAKE_SRC_GIC 4U /* Wakeup from GIC to wake CPU */
+#define SC_PM_WAKE_SRC_NONE 0U /* No wake source, used for self-kill */
+#define SC_PM_WAKE_SRC_SCU 1U /* Wakeup from SCU to resume CPU (IRQSTEER & GIC powered down) */
+#define SC_PM_WAKE_SRC_IRQSTEER 2U /* Wakeup from IRQSTEER to resume CPU (GIC powered down) */
+#define SC_PM_WAKE_SRC_IRQSTEER_GIC 3U /* Wakeup from IRQSTEER+GIC to wake CPU (GIC clock gated) */
+#define SC_PM_WAKE_SRC_GIC 4U /* Wakeup from GIC to wake CPU */
/*@}*/
/* Types */
@@ -247,7 +247,7 @@ sc_err_t sc_pm_set_sys_power_mode(sc_ipc_t ipc, sc_pm_power_mode_t mode);
* individual resource mode set using sc_pm_set_resource_power_mode().
*/
sc_err_t sc_pm_set_partition_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_pm_power_mode_t mode);
+ sc_pm_power_mode_t mode);
/*!
* This function gets the power mode of a partition.
@@ -262,7 +262,24 @@ sc_err_t sc_pm_set_partition_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
* - SC_ERR_PARM if invalid partition
*/
sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_pm_power_mode_t *mode);
+ sc_pm_power_mode_t *mode);
+
+/*!
+ * This function sends a wake interrupt to a partition.
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] pt handle of partition to wake
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ *
+ * An SC_IRQ_SW_WAKE interrupt is sent to all MUs owned by the
+ * partition that have this interrupt enabled. The CPU using an
+ * MU will exit a low-power state to service the MU interrupt.
+ *
+ * Return errors:
+ * - SC_ERR_PARM if invalid partition
+ */
+sc_err_t sc_pm_partition_wake(sc_ipc_t ipc, sc_rm_pt_t pt);
/*!
* This function sets the power mode of a resource.
@@ -275,6 +292,7 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
*
* Return errors:
* - SC_ERR_PARM if invalid resource or mode,
+ * - SC_ERR_PARM if resource is the MU used to make the call,
* - SC_ERR_NOACCESS if caller's partition is not the resource owner
* or parent of the owner
*
@@ -300,7 +318,7 @@ sc_err_t sc_pm_get_sys_power_mode(sc_ipc_t ipc, sc_rm_pt_t pt,
* infrastructure (bus fabrics, clock domains, etc.).
*/
sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_power_mode_t mode);
+ sc_pm_power_mode_t mode);
/*!
* This function sets the power mode for all the resources owned
@@ -316,7 +334,7 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
* Return errors:
* - SC_ERR_PARM if invalid partition or mode,
* - SC_ERR_NOACCESS if caller's partition is not the parent
-* of \a pt
+* (with grant) of \a pt
*
* This functions loops through all the resources owned by \a pt
* and sets the power mode to \a mode. It will skip setting
@@ -326,7 +344,9 @@ sc_err_t sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
* implement some aspects of virtualization.
*/
sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc,
- sc_rm_pt_t pt, sc_pm_power_mode_t mode, sc_rsrc_t exclude);
+ sc_rm_pt_t pt,
+ sc_pm_power_mode_t mode,
+ sc_rsrc_t exclude);
/*!
* This function gets the power mode of a resource.
@@ -341,10 +361,10 @@ sc_err_t sc_pm_set_resource_power_mode_all(sc_ipc_t ipc,
* returned does not reflect the power mode of the partition..
*/
sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_power_mode_t *mode);
+ sc_pm_power_mode_t *mode);
/*!
- * This function requests the low power mode some of the resources
+ * This function specifies the low power mode some of the resources
* can enter based on their state. This API is only valid for the
* following resources : SC_R_A53, SC_R_A53_0, SC_R_A53_1, SC_A53_2,
* SC_A53_3, SC_R_A72, SC_R_A72_0, SC_R_A72_1, SC_R_CC1, SC_R_A35,
@@ -362,7 +382,7 @@ sc_err_t sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
*
*/
sc_err_t sc_pm_req_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_power_mode_t mode);
+ sc_pm_power_mode_t mode);
/*!
* This function requests low-power mode entry for CPU/cluster
@@ -385,7 +405,8 @@ sc_err_t sc_pm_req_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
*
*/
sc_err_t sc_pm_req_cpu_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_power_mode_t mode, sc_pm_wake_src_t wake_src);
+ sc_pm_power_mode_t mode,
+ sc_pm_wake_src_t wake_src);
/*!
* This function is used to set the resume address of a CPU.
@@ -400,9 +421,12 @@ sc_err_t sc_pm_req_cpu_low_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
* - SC_ERR_PARM if invalid resource or address,
* - SC_ERR_NOACCESS if caller's partition is not the parent of the
* resource (CPU) owner
+ *
+ * Note the address is limited by the hardware implementation. See the
+ * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide.
*/
sc_err_t sc_pm_set_cpu_resume_addr(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_faddr_t address);
+ sc_faddr_t address);
/*!
* This function is used to set parameters for CPU resume from
@@ -419,13 +443,16 @@ sc_err_t sc_pm_set_cpu_resume_addr(sc_ipc_t ipc, sc_rsrc_t resource,
* - SC_ERR_PARM if invalid resource or address,
* - SC_ERR_NOACCESS if caller's partition is not the parent of the
* resource (CPU) owner
+ *
+ * Note the address is limited by the hardware implementation. See the
+ * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide.
*/
sc_err_t sc_pm_set_cpu_resume(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_bool_t isPrimary, sc_faddr_t address);
+ sc_bool_t isPrimary, sc_faddr_t address);
/*!
* This function requests the power mode configuration for system-level
- * interfaces including messaging units, interconnect, and memories. This API
+ * interfaces including messaging units, interconnect, and memories. This API
* is only valid for the following resources : SC_R_A53, SC_R_A72, and
* SC_R_M4_x_PID_y. For all other resources, it will return SC_ERR_PARAM.
* The requested power mode will be captured and applied to system-level
@@ -441,7 +468,9 @@ sc_err_t sc_pm_set_cpu_resume(sc_ipc_t ipc, sc_rsrc_t resource,
*
*/
sc_err_t sc_pm_req_sys_if_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_sys_if_t sys_if, sc_pm_power_mode_t hpm, sc_pm_power_mode_t lpm);
+ sc_pm_sys_if_t sys_if,
+ sc_pm_power_mode_t hpm,
+ sc_pm_power_mode_t lpm);
/* @} */
@@ -470,7 +499,7 @@ sc_err_t sc_pm_req_sys_if_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
* Refer to the [Clock List](@ref CLOCKS) for valid clock/PLL values.
*/
sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
+ sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
/*!
* This function gets the rate of a resource's clock/PLL.
@@ -488,10 +517,14 @@ sc_err_t sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource,
* or parent of the owner,
* - SC_ERR_UNAVAILABLE if clock/PLL not applicable to this resource
*
+ * This function returns the actual clock rate of the hardware. This rate
+ * may be different from the original requested clock rate if the resource
+ * is set to a low power mode.
+ *
* Refer to the [Clock List](@ref CLOCKS) for valid clock/PLL values.
*/
sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
+ sc_pm_clk_t clk, sc_pm_clock_rate_t *rate);
/*!
* This function enables/disables a resource's clock.
@@ -513,13 +546,13 @@ sc_err_t sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource,
* Return errors:
* - SC_ERR_PARM if invalid resource or clock,
* - SC_ERR_NOACCESS if caller's partition is not the resource owner
- * or parent of the owner,
+ * or parent (with grant) of the owner,
* - SC_ERR_UNAVAILABLE if clock not applicable to this resource
*
* Refer to the [Clock List](@ref CLOCKS) for valid clock values.
*/
sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
+ sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog);
/*!
* This function sets the parent of a resource's clock.
@@ -528,14 +561,14 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource,
* @param[in] ipc IPC handle
* @param[in] resource ID of the resource
* @param[in] clk clock to affect
- * @param[in] parent New parent of the clock.
+ * @param[in] parent New parent of the clock
*
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors:
* - SC_ERR_PARM if invalid resource or clock,
* - SC_ERR_NOACCESS if caller's partition is not the resource owner
- * or parent of the owner,
+ * or parent (with grant) of the owner,
* - SC_ERR_UNAVAILABLE if clock not applicable to this resource
* - SC_ERR_BUSY if clock is currently enabled.
* - SC_ERR_NOPOWER if resource not powered
@@ -543,7 +576,7 @@ sc_err_t sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource,
* Refer to the [Clock List](@ref CLOCKS) for valid clock values.
*/
sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
+ sc_pm_clk_t clk, sc_pm_clk_parent_t parent);
/*!
* This function gets the parent of a resource's clock.
@@ -551,7 +584,7 @@ sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource,
* @param[in] ipc IPC handle
* @param[in] resource ID of the resource
* @param[in] clk clock to affect
- * @param[out] parent pointer to return parent of clock.
+ * @param[out] parent pointer to return parent of clock
*
* @return Returns an error code (SC_ERR_NONE = success).
*
@@ -564,7 +597,7 @@ sc_err_t sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource,
* Refer to the [Clock List](@ref CLOCKS) for valid clock values.
*/
sc_err_t sc_pm_get_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
+ sc_pm_clk_t clk, sc_pm_clk_parent_t *parent);
/* @} */
@@ -647,10 +680,13 @@ sc_err_t sc_pm_get_reset_part(sc_ipc_t ipc, sc_rm_pt_t *pt);
* This must be used to boot a partition. Only a partition booted this
* way can be rebooted using the watchdog, sc_pm_boot() or
* sc_pm_reboot_partition().
+ *
+ * Note the address is limited by the hardware implementation. See the
+ * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide.
*/
sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rsrc_t resource_cpu, sc_faddr_t boot_addr,
- sc_rsrc_t resource_mu, sc_rsrc_t resource_dev);
+ sc_rsrc_t resource_cpu, sc_faddr_t boot_addr,
+ sc_rsrc_t resource_mu, sc_rsrc_t resource_dev);
/*!
* This function is used to change the boot parameters for a partition.
@@ -669,10 +705,13 @@ sc_err_t sc_pm_boot(sc_ipc_t ipc, sc_rm_pt_t pt,
* This function can be used to change the boot parameters for a partition.
* This can be useful if a partitions reboots differently from the initial
* boot done via sc_pm_boot() or via ROM.
+ *
+ * Note the address is limited by the hardware implementation. See the
+ * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide.
*/
sc_err_t sc_pm_set_boot_parm(sc_ipc_t ipc,
- sc_rsrc_t resource_cpu, sc_faddr_t boot_addr,
- sc_rsrc_t resource_mu, sc_rsrc_t resource_dev);
+ sc_rsrc_t resource_cpu, sc_faddr_t boot_addr,
+ sc_rsrc_t resource_mu, sc_rsrc_t resource_dev);
/*!
* This function is used to reboot the caller's partition.
@@ -725,7 +764,7 @@ void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type);
* sc_pm_reboot_continue() to continue the boot.
*/
sc_err_t sc_pm_reboot_partition(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_pm_reset_type_t type);
+ sc_pm_reset_type_t type);
/*!
* This function is used to continue the reboot a partition.
@@ -756,17 +795,20 @@ sc_err_t sc_pm_reboot_continue(sc_ipc_t ipc, sc_rm_pt_t pt);
* resource (CPU) owner
*
* This function is usually used to start a secondar CPU in the
- * same partition as the caller. It is not used to start the first
- * CPU in a dedicated partition. That would be started by calling
+ * same partition as the caller. It is not used to start the first
+ * CPU in a dedicated partition. That would be started by calling
* sc_pm_boot().
*
* A CPU started with sc_pm_cpu_start() will not restart as a result
* of a watchdog event or calling sc_pm_reboot() or sc_pm_reboot_partition().
* Those will reboot that partition which will start the CPU started with
* sc_pm_boot().
+ *
+ * Note the address is limited by the hardware implementation. See the
+ * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide.
*/
sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
- sc_faddr_t address);
+ sc_faddr_t address);
/*!
* This function is used to reset a CPU.
@@ -784,10 +826,36 @@ sc_err_t sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
* Note this just resets the CPU. None of the peripherals or bus fabric used by
* the CPU is reset. State configured in the SCFW is not reset. The SW running
* on the core has to understand and deal with this.
+ *
+ * The address is limited by the hardware implementation. See the
+ * [CPU Start Address](@ref BOOT_ADDR) section in the Porting Guide.
*/
void sc_pm_cpu_reset(sc_ipc_t ipc, sc_rsrc_t resource, sc_faddr_t address);
/*!
+ * This function is used to reset a peripheral.
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] resource resource to reset
+ *
+ * This function will reset a resource. Most resources cannot be reset unless
+ * the SoC design specifically allows it. In the case on MUs, the IPC/RPC
+ * protocol is also reset. Note a caller cannot reset an MU that this API
+ * call is sent on.
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ *
+ * Return errors:
+ * - SC_ERR_PARM if invalid resource,
+ * - SC_ERR_PARM if resource is the MU used to make the call,
+ * - SC_ERR_NOACCESS if caller's partition is not the resource owner or parent
+ * (with grant) of the owner,
+ * - SC_ERR_BUSY if the resource cannot be reset bdue to power state of buses,
+ * - SC_ERR_UNAVAILABLE if the resource cannot be reset due to hardware limitations
+ */
+sc_err_t sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource);
+
+/*!
* This function returns a bool indicating if a partition was started.
*
* @param[in] ipc IPC handle
@@ -802,7 +870,6 @@ sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt);
/* @} */
-#endif /* SC_PM_API_H */
+#endif /* SC_PM_API_H */
/**@}*/
-
diff --git a/include/soc/imx8/sc/svc/rm/api.h b/include/soc/imx8/sc/svc/rm/api.h
index faaa8d062053..b5c3c2223a79 100644
--- a/include/soc/imx8/sc/svc/rm/api.h
+++ b/include/soc/imx8/sc/svc/rm/api.h
@@ -10,7 +10,7 @@
* Resource Management (RM) function. This includes functions for
* partitioning resources, pads, and memory regions.
*
- * @addtogroup RM_SVC (SVC) Resource Management Service
+ * @addtogroup RM_SVC RM: Resource Management Service
*
* Module for the Resource Management (RM) service.
*
@@ -32,44 +32,44 @@
* @name Defines for type widths
*/
/*@{*/
-#define SC_RM_PARTITION_W 5U /* Width of sc_rm_pt_t */
-#define SC_RM_MEMREG_W 6U /* Width of sc_rm_mr_t */
-#define SC_RM_DID_W 4U /* Width of sc_rm_did_t */
-#define SC_RM_SID_W 6U /* Width of sc_rm_sid_t */
-#define SC_RM_SPA_W 2U /* Width of sc_rm_spa_t */
-#define SC_RM_PERM_W 3U /* Width of sc_rm_perm_t */
+#define SC_RM_PARTITION_W 5U /* Width of sc_rm_pt_t */
+#define SC_RM_MEMREG_W 6U /* Width of sc_rm_mr_t */
+#define SC_RM_DID_W 4U /* Width of sc_rm_did_t */
+#define SC_RM_SID_W 6U /* Width of sc_rm_sid_t */
+#define SC_RM_SPA_W 2U /* Width of sc_rm_spa_t */
+#define SC_RM_PERM_W 3U /* Width of sc_rm_perm_t */
/*@}*/
/*!
* @name Defines for ALL parameters
*/
/*@{*/
-#define SC_RM_PT_ALL ((sc_rm_pt_t) UINT8_MAX) /* All partitions */
-#define SC_RM_MR_ALL ((sc_rm_mr_t) UINT8_MAX) /* All memory regions */
+#define SC_RM_PT_ALL ((sc_rm_pt_t) UINT8_MAX) /* All partitions */
+#define SC_RM_MR_ALL ((sc_rm_mr_t) UINT8_MAX) /* All memory regions */
/*@}*/
/*!
* @name Defines for sc_rm_spa_t
*/
/*@{*/
-#define SC_RM_SPA_PASSTHRU 0U /* Pass through (attribute driven by master) */
-#define SC_RM_SPA_PASSSID 1U /* Pass through and output on SID */
-#define SC_RM_SPA_ASSERT 2U /* Assert (force to be secure/privileged) */
-#define SC_RM_SPA_NEGATE 3U /* Negate (force to be non-secure/user) */
+#define SC_RM_SPA_PASSTHRU 0U /* Pass through (attribute driven by master) */
+#define SC_RM_SPA_PASSSID 1U /* Pass through and output on SID */
+#define SC_RM_SPA_ASSERT 2U /* Assert (force to be secure/privileged) */
+#define SC_RM_SPA_NEGATE 3U /* Negate (force to be non-secure/user) */
/*@}*/
/*!
* @name Defines for sc_rm_perm_t
*/
/*@{*/
-#define SC_RM_PERM_NONE 0U /* No access */
-#define SC_RM_PERM_SEC_R 1U /* Secure RO */
-#define SC_RM_PERM_SECPRIV_RW 2U /* Secure privilege R/W */
-#define SC_RM_PERM_SEC_RW 3U /* Secure R/W */
-#define SC_RM_PERM_NSPRIV_R 4U /* Secure R/W, non-secure privilege RO */
-#define SC_RM_PERM_NS_R 5U /* Secure R/W, non-secure RO */
-#define SC_RM_PERM_NSPRIV_RW 6U /* Secure R/W, non-secure privilege R/W */
-#define SC_RM_PERM_FULL 7U /* Full access */
+#define SC_RM_PERM_NONE 0U /* No access */
+#define SC_RM_PERM_SEC_R 1U /* Secure RO */
+#define SC_RM_PERM_SECPRIV_RW 2U /* Secure privilege R/W */
+#define SC_RM_PERM_SEC_RW 3U /* Secure R/W */
+#define SC_RM_PERM_NSPRIV_R 4U /* Secure R/W, non-secure privilege RO */
+#define SC_RM_PERM_NS_R 5U /* Secure R/W, non-secure RO */
+#define SC_RM_PERM_NSPRIV_RW 6U /* Secure R/W, non-secure privilege R/W */
+#define SC_RM_PERM_FULL 7U /* Full access */
/*@}*/
/* Types */
@@ -157,7 +157,8 @@ typedef uint8_t sc_rm_perm_t;
* no CPU. It's useful to separate out a master and the memory it uses.
*/
sc_err_t sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure,
- sc_bool_t isolated, sc_bool_t restricted, sc_bool_t grant, sc_bool_t coherent);
+ sc_bool_t isolated, sc_bool_t restricted,
+ sc_bool_t grant, sc_bool_t coherent);
/*!
* This function makes a partition confidential.
@@ -232,8 +233,7 @@ sc_rm_did_t sc_rm_get_did(sc_ipc_t ipc);
* Assumes no assigned resources or memory regions yet! The number of static
* DID is fixed by the SC at boot.
*/
-sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rm_did_t did);
+sc_err_t sc_rm_partition_static(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_did_t did);
/*!
* This function locks a partition.
@@ -278,8 +278,7 @@ sc_err_t sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt);
* - SC_ERR_NOACCESS if caller's partition is not the parent of \a pt,
* - SC_ERR_LOCKED if either partition is locked
*/
-sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rm_pt_t pt_parent);
+sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent);
/*!
* This function moves all movable resources/pads owned by a source partition
@@ -309,7 +308,7 @@ sc_err_t sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt,
* - SC_ERR_LOCKED if either partition is locked
*/
sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst,
- sc_bool_t move_rsrc, sc_bool_t move_pads);
+ sc_bool_t move_rsrc, sc_bool_t move_pads);
/* @} */
@@ -348,8 +347,7 @@ sc_err_t sc_rm_move_all(sc_ipc_t ipc, sc_rm_pt_t pt_src, sc_rm_pt_t pt_dst,
* of the owner,
* - SC_ERR_LOCKED if the owning partition or \a pt is locked
*/
-sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt,
- sc_rsrc_t resource);
+sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource);
/*!
* This function flags resources as movable or not.
@@ -372,7 +370,7 @@ sc_err_t sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt,
* resources from moving.
*/
sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst,
- sc_rsrc_t resource_lst, sc_bool_t movable);
+ sc_rsrc_t resource_lst, sc_bool_t movable);
/*!
* This function flags all of a subsystem's resources as movable
@@ -397,7 +395,7 @@ sc_err_t sc_rm_set_resource_movable(sc_ipc_t ipc, sc_rsrc_t resource_fst,
* resources owned by the caller are set.
*/
sc_err_t sc_rm_set_subsys_rsrc_movable(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_bool_t movable);
+ sc_bool_t movable);
/*!
* This function sets attributes for a resource which is a bus master (i.e.
@@ -426,7 +424,8 @@ sc_err_t sc_rm_set_subsys_rsrc_movable(sc_ipc_t ipc, sc_rsrc_t resource,
* and generate bus transactions).
*/
sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rm_spa_t sa, sc_rm_spa_t pa, sc_bool_t smmu_bypass);
+ sc_rm_spa_t sa, sc_rm_spa_t pa,
+ sc_bool_t smmu_bypass);
/*!
* This function sets the StreamID for a resource which is a bus master (i.e.
@@ -450,7 +449,7 @@ sc_err_t sc_rm_set_master_attributes(sc_ipc_t ipc, sc_rsrc_t resource,
* bypass.
*/
sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rm_sid_t sid);
+ sc_rm_sid_t sid);
/*!
* This function sets access permissions for a peripheral resource.
@@ -480,7 +479,7 @@ sc_err_t sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource,
* model and generate bus transactions).
*/
sc_err_t sc_rm_set_peripheral_permissions(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rm_pt_t pt, sc_rm_perm_t perm);
+ sc_rm_pt_t pt, sc_rm_perm_t perm);
/*!
* This function gets ownership status of a resource.
@@ -509,7 +508,7 @@ sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource);
* If \a resource is out of range then SC_ERR_PARM is returned.
*/
sc_err_t sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rm_pt_t *pt);
+ sc_rm_pt_t *pt);
/*!
* This function is used to test if a resource is a bus master.
@@ -556,7 +555,7 @@ sc_bool_t sc_rm_is_resource_peripheral(sc_ipc_t ipc, sc_rsrc_t resource);
* - SC_PARM if \a resource is out of range
*/
sc_err_t sc_rm_get_resource_info(sc_ipc_t ipc, sc_rsrc_t resource,
- sc_rm_sid_t *sid);
+ sc_rm_sid_t *sid);
/* @} */
@@ -586,15 +585,18 @@ sc_err_t sc_rm_get_resource_info(sc_ipc_t ipc, sc_rsrc_t resource,
* - SC_ERR_UNAVAILABLE if memory region table is full (no more allocation
* space)
*
- * The area covered by the memory region must currently be owned by the caller.
- * By default, the new region will have access permission set to allow the
- * caller to access.
+ * This function will create a new memory region. The area covered by the
+ * new region must already exist in a memory region owned by the caller. The
+ * result will be two memory regions, the new one overlapping the existing
+ * one. The new region has higher priority. See the XRDC2 MRC documentation
+ * for how it resolves access permissions in this case. By default, the new
+ * region will have access permission set to allow the caller to access.
*/
sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr,
- sc_faddr_t addr_start, sc_faddr_t addr_end);
+ sc_faddr_t addr_start, sc_faddr_t addr_end);
/*!
- * This function requests that the SC split a memory region.
+ * This function requests that the SC split an existing memory region.
*
* @param[in] ipc IPC handle
* @param[in] mr handle of memory region to split
@@ -615,10 +617,13 @@ sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr,
* - SC_ERR_UNAVAILABLE if memory region table is full (no more allocation
* space)
*
- * Note the new region must start or end on the split region.
+ * This function will take an existing region and split it into two,
+ * non-overlapping regions. Note the new region must start or end on the
+ * split region.
*/
sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr,
- sc_rm_mr_t *mr_ret, sc_faddr_t addr_start, sc_faddr_t addr_end);
+ sc_rm_mr_t *mr_ret, sc_faddr_t addr_start,
+ sc_faddr_t addr_end);
/*!
* This function requests that the SC fragment a memory region.
@@ -641,10 +646,12 @@ sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr,
* space)
*
* This function finds the memory region containing the address range.
- * It then splits it as required and returns the extracted region.
+ * It then splits it as required and returns the extracted region. The
+ * result is 2-3 non-overlapping regions, depending on how the new region
+ * aligns with existing regions.
*/
sc_err_t sc_rm_memreg_frag(sc_ipc_t ipc, sc_rm_mr_t *mr_ret,
- sc_faddr_t addr_start, sc_faddr_t addr_end);
+ sc_faddr_t addr_start, sc_faddr_t addr_end);
/*!
* This function frees a memory region.
@@ -685,7 +692,7 @@ sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr);
* region containing the range specified.
*/
sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr,
- sc_faddr_t addr_start, sc_faddr_t addr_end);
+ sc_faddr_t addr_start, sc_faddr_t addr_end);
/*!
* This function assigns ownership of a memory region.
@@ -697,6 +704,12 @@ sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr,
*
* @return Returns an error code (SC_ERR_NONE = success).
*
+ * This function assigns a memory region to a partition. This partition is then
+ * the owner. All regions always have an owner (one owner). The owner
+ * has various rights to make API calls affecting the region. Ownership
+ * does not imply access to the memory itself (that is based on access
+ * rights).
+ *
* Return errors:
* - SC_PARM if arguments out of range or invalid,
* - SC_ERR_NOACCESS if caller's partition is not the \a mr owner or parent
@@ -715,11 +728,9 @@ sc_err_t sc_rm_assign_memreg(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_mr_t mr);
* applied for
* @param[in] perm permissions to apply to \a mr for \a pt
*
- * This function assigned a memory region to a partition. This partition is then
- * the owner. All regions always have an owner (one owner). The owner
- * has various rights to make API calls affecting the region. Ownership
- * does not imply access to the memory itself (that is based on access
- * rights).
+ * This operates on the memory region specified. If SC_RM_PT_ALL is specified
+ * then it operates on all the regions owned by the caller that exist at the
+ * time of the call.
*
* @return Returns an error code (SC_ERR_NONE = success).
*
@@ -734,7 +745,7 @@ sc_err_t sc_rm_assign_memreg(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_mr_t mr);
* memory region based on the attributes of a transaction from bus master.
*/
sc_err_t sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr,
- sc_rm_pt_t pt, sc_rm_perm_t perm);
+ sc_rm_pt_t pt, sc_rm_perm_t perm);
/*!
* This function gets ownership status of a memory region.
@@ -763,7 +774,7 @@ sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr);
* - SC_PARM if \a mr is out of range
*/
sc_err_t sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr,
- sc_faddr_t *addr_start, sc_faddr_t *addr_end);
+ sc_faddr_t *addr_start, sc_faddr_t *addr_end);
/* @} */
@@ -816,7 +827,7 @@ sc_err_t sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad);
* pads from moving.
*/
sc_err_t sc_rm_set_pad_movable(sc_ipc_t ipc, sc_pad_t pad_fst,
- sc_pad_t pad_lst, sc_bool_t movable);
+ sc_pad_t pad_lst, sc_bool_t movable);
/*!
* This function gets ownership status of a pad.
@@ -846,7 +857,6 @@ void sc_rm_dump(sc_ipc_t ipc);
/* @} */
-#endif /* SC_RM_API_H */
+#endif /* SC_RM_API_H */
/**@}*/
-
diff --git a/include/soc/imx8/sc/svc/seco/api.h b/include/soc/imx8/sc/svc/seco/api.h
index 505587358b49..3d1a2ea1badf 100644
--- a/include/soc/imx8/sc/svc/seco/api.h
+++ b/include/soc/imx8/sc/svc/seco/api.h
@@ -9,10 +9,14 @@
* Header file containing the public API for the System Controller (SC)
* Security (SECO) function.
*
- * @addtogroup SECO_SVC (SVC) Security Service
+ * @addtogroup SECO_SVC SECO: Security Service
*
* Module for the Security (SECO) service.
*
+ * @anchor seco_err
+ *
+ * @includedoc seco/details.dox
+ *
* @{
*/
@@ -30,21 +34,22 @@
* @name Defines for sc_seco_auth_cmd_t
*/
/*@{*/
-#define SC_SECO_AUTH_CONTAINER 0U /* Authenticate container */
-#define SC_SECO_VERIFY_IMAGE 1U /* Verify image */
-#define SC_SECO_REL_CONTAINER 2U /* Release container */
-#define SC_SECO_AUTH_SECO_FW 3U /* SECO Firmware */
-#define SC_SECO_AUTH_HDMI_TX_FW 4U /* HDMI TX Firmware */
-#define SC_SECO_AUTH_HDMI_RX_FW 5U /* HDMI RX Firmware */
+#define SC_SECO_AUTH_CONTAINER 0U /* Authenticate container */
+#define SC_SECO_VERIFY_IMAGE 1U /* Verify image */
+#define SC_SECO_REL_CONTAINER 2U /* Release container */
+#define SC_SECO_AUTH_SECO_FW 3U /* SECO Firmware */
+#define SC_SECO_AUTH_HDMI_TX_FW 4U /* HDMI TX Firmware */
+#define SC_SECO_AUTH_HDMI_RX_FW 5U /* HDMI RX Firmware */
+#define SC_SECO_EVERIFY_IMAGE 6U /* Enhanced verify image */
/*@}*/
/*!
* @name Defines for seco_rng_stat_t
*/
/*@{*/
-#define SC_SECO_RNG_STAT_UNAVAILABLE 0U /* Unable to initialize the RNG */
-#define SC_SECO_RNG_STAT_INPROGRESS 1U /* Initialization is on-going */
-#define SC_SECO_RNG_STAT_READY 2U /* Initialized */
+#define SC_SECO_RNG_STAT_UNAVAILABLE 0U /* Unable to initialize the RNG */
+#define SC_SECO_RNG_STAT_INPROGRESS 1U /* Initialization is on-going */
+#define SC_SECO_RNG_STAT_READY 2U /* Initialized */
/*@}*/
/* Types */
@@ -78,17 +83,20 @@ typedef uint32_t sc_seco_rng_stat_t;
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if word fuse index param out of range or invalid
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if word fuse index param out of range or invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This is used to load images via the SECO. Examples include SECO
* Firmware and IVT/CSF data used for authentication. These are usually
* loaded into SECO TCM. \a addr_src is in secure memory.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src,
- sc_faddr_t addr_dst, uint32_t len, sc_bool_t fw);
+ sc_faddr_t addr_dst, uint32_t len, sc_bool_t fw);
/*!
* This function is used to authenticate a SECO image or command.
@@ -100,17 +108,65 @@ sc_err_t sc_seco_image_load(sc_ipc_t ipc, sc_faddr_t addr_src,
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if word fuse index param out of range or invalid
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if word fuse index param out of range or invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_BUSY if SECO is busy with another authentication request,
+ * - SC_ERR_FAIL if SECO response is bad,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This is used to authenticate a SECO image or issue a security
* command. \a addr often points to an container. It is also
* just data (or even unused) for some commands.
*
- * See the Security Reference Manual (SRM) for more info.
+ * Implementation of this command depends on the underlying security
+ * architecture of the device. For example, on devices with SECO FW,
+ * the following options apply:
+ *
+ * - cmd=SC_SECO_AUTH_CONTAINER, addr=container address (sends AHAB_AUTH_CONTAINER_REQ to SECO)
+ * - cmd=SC_SECO_VERIFY_IMAGE, addr=image mask (sends AHAB_VERIFY_IMAGE_REQ to SECO)
+ * - cmd=SC_SECO_REL_CONTAINER, addr unused (sends AHAB_RELEASE_CONTAINER_REQ to SECO)
+ * - cmd=SC_SECO_AUTH_HDMI_TX_FW, addr unused (sends AHAB_ENABLE_HDMI_X_REQ with Subsystem=0 to SECO)
+ * - cmd=SC_SECO_AUTH_HDMI_RX_FW, addr unused (sends AHAB_ENABLE_HDMI_X_REQ with Subsystem=1 to SECO)
+ *
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_authenticate(sc_ipc_t ipc,
- sc_seco_auth_cmd_t cmd, sc_faddr_t addr);
+ sc_seco_auth_cmd_t cmd, sc_faddr_t addr);
+
+/*!
+ * This function is used to authenticate a SECO image or command. This is an
+ * enhanced version that has additional mask arguments.
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] cmd authenticate command
+ * @param[in] addr address of/or metadata
+ * @param[in] mask1 metadata
+ * @param[in] mask2 metadata
+ *
+ * Return errors codes:
+ * - SC_ERR_PARM if word fuse index param out of range or invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_BUSY if SECO is busy with another authentication request,
+ * - SC_ERR_FAIL if SECO response is bad,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
+ *
+ * This supports all the commands found in sc_seco_authenticate(). Those
+ * commands should set both masks to 0 (except SC_SECO_VERIFY_IMAGE).
+
+ * New commands are as follows:
+ *
+ * - cmd=SC_SECO_VERIFY_IMAGE, addr unused, mask1=image mask, mask2 unused (sends AHAB_VERIFY_IMAGE_REQ to SECO)
+ * - cmd=SC_SECO_EVERIFY_IMAGE, addr=container address, mask1=image mask, mask2=move mask (sends AHAB_EVERIFY_IMAGE_REQ to SECO)
+ *
+ * See the <em>SECO API Reference Guide</em> for more info.
+ */
+sc_err_t sc_seco_enh_authenticate(sc_ipc_t ipc,
+ sc_seco_auth_cmd_t cmd, sc_faddr_t addr,
+ uint32_t mask1, uint32_t mask2);
/* @} */
@@ -128,11 +184,14 @@ sc_err_t sc_seco_authenticate(sc_ipc_t ipc,
* @return Returns and error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
- * This message is used for going from Open to NXP Closed to OEM Closed.
+ * This function is used for going from Open to NXP Closed to OEM Closed.
* Note \a change is NOT the new desired lifecycle. It is a lifecycle
- * transition as documented in the Security Reference Manual (SRM).
+ * transition as documented in the <em>SECO API Reference Guide</em>.
*
* If any SECO request fails or only succeeds because the part is in an
* "OEM open" lifecycle, then a request to transition from "NXP closed"
@@ -152,7 +211,10 @@ sc_err_t sc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t change);
* @return Returns and error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* Note \a addr must be a pointer to a signed message block.
*
@@ -160,7 +222,7 @@ sc_err_t sc_seco_forward_lifecycle(sc_ipc_t ipc, uint32_t change);
* by NXP SRK. For OEM States (Partial Field Return), must be signed by OEM
* SRK.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr);
@@ -177,8 +239,11 @@ sc_err_t sc_seco_return_lifecycle(sc_ipc_t ipc, sc_faddr_t addr);
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if \a info is invalid
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if \a info is invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*/
sc_err_t sc_seco_commit(sc_ipc_t ipc, uint32_t *info);
@@ -199,12 +264,15 @@ sc_err_t sc_seco_commit(sc_ipc_t ipc, uint32_t *info);
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if \a mode is invalid
- * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if \a mode is invalid,
+ * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This is used to set the SECO attestation mode. This can be prover
- * or verfier. See the Security Reference Manual (SRM) for more on the
+ * or verfier. See the <em>SECO API Reference Guide</em> for more on the
* suported modes, mode values, and mode behavior.
*/
sc_err_t sc_seco_attest_mode(sc_ipc_t ipc, uint32_t mode);
@@ -219,14 +287,17 @@ sc_err_t sc_seco_attest_mode(sc_ipc_t ipc, uint32_t mode);
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This is used to ask SECO to perform an attestation. The result depends
* on the attestation mode. After this call, the signature can be
* requested or a verify can be requested.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_attest(sc_ipc_t ipc, uint64_t nonce);
@@ -245,11 +316,14 @@ sc_err_t sc_seco_attest(sc_ipc_t ipc, uint64_t nonce);
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if \a addr bad or attestation has not been requested
- * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if \a addr bad or attestation has not been requested,
+ * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_get_attest_pkey(sc_ipc_t ipc, sc_faddr_t addr);
@@ -268,11 +342,14 @@ sc_err_t sc_seco_get_attest_pkey(sc_ipc_t ipc, sc_faddr_t addr);
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if \a addr bad or attestation has not been requested
- * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if \a addr bad or attestation has not been requested,
+ * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_get_attest_sign(sc_ipc_t ipc, sc_faddr_t addr);
@@ -289,12 +366,15 @@ sc_err_t sc_seco_get_attest_sign(sc_ipc_t ipc, sc_faddr_t addr);
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if \a addr bad or attestation has not been requested
- * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller
- * - SC_ERR_UNAVAILABLE if SECO not available
- * - SC_ERR_FAIL if signature doesn't match
+ * - SC_ERR_PARM if \a addr bad or attestation has not been requested,
+ * - SC_ERR_NOACCESS if SC_R_ATTESTATON not owned by caller,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_FAIL if signature doesn't match,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_attest_verify(sc_ipc_t ipc, sc_faddr_t addr);
@@ -317,16 +397,20 @@ sc_err_t sc_seco_attest_verify(sc_ipc_t ipc, sc_faddr_t addr);
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if word fuse index param out of range or invalid
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if word fuse index param out of range or invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This function is used to encapsulate sensitive keys in a specific structure
* called a blob, which provides both confidentiality and integrity protection.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id,
- sc_faddr_t load_addr, sc_faddr_t export_addr, uint16_t max_size);
+ sc_faddr_t load_addr, sc_faddr_t export_addr,
+ uint16_t max_size);
/*!
* This function is used to load a SECO key.
@@ -338,18 +422,20 @@ sc_err_t sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id,
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if word fuse index param out of range or invalid
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if word fuse index param out of range or invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This function is used to install private cryptographic keys encapsulated
* in a blob previously generated by SECO. The controller can be either the
* IEE or the VPU. The blob header carries the controller type and the key
* size, as provided by the user when generating the key blob.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
-sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id,
- sc_faddr_t addr);
+sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id, sc_faddr_t addr);
/* @} */
@@ -368,17 +454,20 @@ sc_err_t sc_seco_load_key(sc_ipc_t ipc, uint32_t id,
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if word fuse index param out of range or invalid
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if word fuse index param out of range or invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This function is supported only in OEM-closed lifecycle. It generates
* the mfg public key and stores it in a specific location in the secure
* memory.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr,
- uint16_t dst_size);
+ uint16_t dst_size);
/*!
* This function is used to update the manufacturing protection message
@@ -392,18 +481,21 @@ sc_err_t sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr,
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if word fuse index param out of range or invalid
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if word fuse index param out of range or invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This function is supported only in OEM-closed lifecycle. It updates the
* content of the MPMR (Manufacturing Protection Message register of 256
* bits). This register will be appended to the input-data message when
* generating the signature. Please refer to the CAAM block guide for details.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr,
- uint8_t size, uint8_t lock);
+ uint8_t size, uint8_t lock);
/*!
* This function is used to get the manufacturing protection signature.
@@ -417,8 +509,11 @@ sc_err_t sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr,
* @return Returns an error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_PARM if word fuse index param out of range or invalid
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_PARM if word fuse index param out of range or invalid,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* This function is used to generate an ECDSA signature for an input-data
* message and to store it in a specific location in the secure memory. It
@@ -426,10 +521,11 @@ sc_err_t sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr,
* signature, the RNG must be initialized. In case it has not been started
* an error will be returned.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr,
- uint16_t msg_size, sc_faddr_t dst_addr, uint16_t dst_size);
+ uint16_t msg_size, sc_faddr_t dst_addr,
+ uint16_t dst_size);
/* @} */
@@ -445,8 +541,7 @@ sc_err_t sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr,
* @param[out] version pointer to return build number
* @param[out] commit pointer to return commit ID (git SHA-1)
*/
-void sc_seco_build_info(sc_ipc_t ipc, uint32_t *version,
- uint32_t *commit);
+void sc_seco_build_info(sc_ipc_t ipc, uint32_t *version, uint32_t *commit);
/*!
* This function is used to return SECO chip info.
@@ -458,9 +553,16 @@ void sc_seco_build_info(sc_ipc_t ipc, uint32_t *version,
* @param[out] uid_h pointer to return UID (upper 32 bits)
*
* @return Returns and error code (SC_ERR_NONE = success).
+ *
+ * Return errors codes:
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*/
sc_err_t sc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc,
- uint16_t *monotonic, uint32_t *uid_l, uint32_t *uid_h);
+ uint16_t *monotonic, uint32_t *uid_l,
+ uint32_t *uid_h);
/*!
* This function securely enables debug.
@@ -471,11 +573,14 @@ sc_err_t sc_seco_chip_info(sc_ipc_t ipc, uint16_t *lc,
* @return Returns and error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* Note \a addr must be a pointer to a signed message block.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr);
@@ -488,11 +593,16 @@ sc_err_t sc_seco_enable_debug(sc_ipc_t ipc, sc_faddr_t addr);
*
* @return Returns an error code (SC_ERR_NONE = success).
*
+ * Return errors codes:
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
+ *
* Read of \a idx 0 captures events from SECO. Loop starting
* with 0 until an error is returned to dump all events.
*/
-sc_err_t sc_seco_get_event(sc_ipc_t ipc, uint8_t idx,
- uint32_t *event);
+sc_err_t sc_seco_get_event(sc_ipc_t ipc, uint8_t idx, uint32_t *event);
/* @} */
@@ -510,15 +620,17 @@ sc_err_t sc_seco_get_event(sc_ipc_t ipc, uint8_t idx,
* @return Returns and error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* Note \a addr must be a pointer to a signed message block.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr);
-
/*!
* This function applies a patch.
*
@@ -528,11 +640,14 @@ sc_err_t sc_seco_fuse_write(sc_ipc_t ipc, sc_faddr_t addr);
* @return Returns and error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* Note \a addr must be a pointer to a signed message block.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_patch(sc_ipc_t ipc, sc_faddr_t addr);
@@ -545,18 +660,95 @@ sc_err_t sc_seco_patch(sc_ipc_t ipc, sc_faddr_t addr);
* @return Returns and error code (SC_ERR_NONE = success).
*
* Return errors codes:
- * - SC_ERR_UNAVAILABLE if SECO not available
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
*
* The RNG is started automatically after all CPUs are booted. This
* function can be used to start earlier and to check the status.
*
- * See the Security Reference Manual (SRM) for more info.
+ * See the <em>SECO API Reference Guide</em> for more info.
*/
sc_err_t sc_seco_start_rng(sc_ipc_t ipc, sc_seco_rng_stat_t *status);
+/*!
+ * This function sends a generic signed message to the
+ * SECO SHE/HSM components.
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] addr address of message block
+ *
+ * @return Returns and error code (SC_ERR_NONE = success).
+ *
+ * Return errors codes:
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
+ *
+ * Note \a addr must be a pointer to a signed message block.
+ *
+ * See the <em>SECO API Reference Guide</em> for more info.
+ */
+sc_err_t sc_seco_sab_msg(sc_ipc_t ipc, sc_faddr_t addr);
+
+/*!
+ * This function is used to enable security violation and tamper interrupts.
+ * These are then reported using the IRQ service via the SC_IRQ_SECVIO
+ * interrupt. Note it is automatically enabled at boot.
+ *
+ * @param[in] ipc IPC handle
+ *
+ * @return Returns and error code (SC_ERR_NONE = success).
+ *
+ * Return errors codes:
+ * - SC_ERR_NOACCESS if caller does not own SC_R_SECVIO,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
+ *
+ * The security violation interrupt is self-masking. Once it is cleared in
+ * the SNVS it must be re-enabled using this function.
+ */
+sc_err_t sc_seco_secvio_enable(sc_ipc_t ipc);
+
+/*!
+ * This function is used to read/write SNVS security violation
+ * and tamper registers.
+ *
+ * @param[in] ipc IPC handle
+ * @param[in] id register ID
+ * @param[in] access 0=read, 1=write
+ * @param[in] data0 pointer to data to read or write
+ * @param[in] data1 pointer to data to read or write
+ * @param[in] data2 pointer to data to read or write
+ * @param[in] data3 pointer to data to read or write
+ * @param[in] data4 pointer to data to read or write
+ * @param[in] size number of valid data words
+ *
+ * @return Returns and error code (SC_ERR_NONE = success).
+ *
+ * Return errors codes:
+ * - SC_ERR_NOACCESS if caller does not own SC_R_SECVIO,
+ * - SC_ERR_UNAVAILABLE if SECO not available,
+ * - SC_ERR_IPC if SECO response has bad header tag or size,
+ * - SC_ERR_VERSION if SECO response has bad version,
+ * - Others, see the [Security Service Detailed Description](\ref seco_err) section
+ *
+ * Unused data words can be passed a NULL pointer.
+ *
+ * See AHAB_MANAGE_SNVS_REQ in the <em>SECO API Reference Guide</em> for
+ * more info.
+ */
+sc_err_t sc_seco_secvio_config(sc_ipc_t ipc, uint8_t id, uint8_t access,
+ uint32_t *data0, uint32_t *data1,
+ uint32_t *data2, uint32_t *data3,
+ uint32_t *data4, uint8_t size);
+
/* @} */
-#endif /* SC_SECO_API_H */
+#endif /* SC_SECO_API_H */
/**@}*/
-
diff --git a/include/soc/imx8/sc/svc/timer/api.h b/include/soc/imx8/sc/svc/timer/api.h
index 6c80ceaf53f6..09da665ca881 100644
--- a/include/soc/imx8/sc/svc/timer/api.h
+++ b/include/soc/imx8/sc/svc/timer/api.h
@@ -9,7 +9,7 @@
* Header file containing the public API for the System Controller (SC)
* Timer function.
*
- * @addtogroup TIMER_SVC (SVC) Timer Service
+ * @addtogroup TIMER_SVC TIMER: Timer Service
*
* Module for the Timer service. This includes support for the watchdog, RTC,
* and system counter. Note every resource partition has a watchdog it can
@@ -32,18 +32,18 @@
* @name Defines for type widths
*/
/*@{*/
-#define SC_TIMER_ACTION_W 3U /* Width of sc_timer_wdog_action_t */
+#define SC_TIMER_ACTION_W 3U /* Width of sc_timer_wdog_action_t */
/*@}*/
/*!
* @name Defines for sc_timer_wdog_action_t
*/
/*@{*/
-#define SC_TIMER_WDOG_ACTION_PARTITION 0U /* Reset partition */
-#define SC_TIMER_WDOG_ACTION_WARM 1U /* Warm reset system */
-#define SC_TIMER_WDOG_ACTION_COLD 2U /* Cold reset system */
-#define SC_TIMER_WDOG_ACTION_BOARD 3U /* Reset board */
-#define SC_TIMER_WDOG_ACTION_IRQ 4U /* Only generate IRQs */
+#define SC_TIMER_WDOG_ACTION_PARTITION 0U /* Reset partition */
+#define SC_TIMER_WDOG_ACTION_WARM 1U /* Warm reset system */
+#define SC_TIMER_WDOG_ACTION_COLD 2U /* Cold reset system */
+#define SC_TIMER_WDOG_ACTION_BOARD 3U /* Reset board */
+#define SC_TIMER_WDOG_ACTION_IRQ 4U /* Only generate IRQs */
/*@}*/
/* Types */
@@ -76,8 +76,7 @@ typedef uint32_t sc_timer_wdog_time_t;
* @return Returns an error code (SC_ERR_NONE = success, SC_ERR_LOCKED
* = locked).
*/
-sc_err_t sc_timer_set_wdog_timeout(sc_ipc_t ipc,
- sc_timer_wdog_time_t timeout);
+sc_err_t sc_timer_set_wdog_timeout(sc_ipc_t ipc, sc_timer_wdog_time_t timeout);
/*!
* This function sets the watchdog pre-timeout in milliseconds. If not
@@ -94,7 +93,7 @@ sc_err_t sc_timer_set_wdog_timeout(sc_ipc_t ipc,
* @return Returns an error code (SC_ERR_NONE = success).
*/
sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc,
- sc_timer_wdog_time_t pre_timeout);
+ sc_timer_wdog_time_t pre_timeout);
/*!
* This function starts the watchdog.
@@ -104,8 +103,15 @@ sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc,
*
* @return Returns an error code (SC_ERR_NONE = success).
*
+ * Return errors:
+ * - SC_ERR_NOACCESS if caller's partition is not isolated
+ *
* If \a lock is set then the watchdog cannot be stopped or the timeout
* period changed.
+ *
+ * If the calling partition is not isolated then the wdog cannot be used.
+ * This is always the case if a non-secure partition is running on the same
+ * CPU as a secure partition (e.g. Linux under TZ). See sc_rm_partition_alloc().
*/
sc_err_t sc_timer_start_wdog(sc_ipc_t ipc, sc_bool_t lock);
@@ -142,8 +148,9 @@ sc_err_t sc_timer_ping_wdog(sc_ipc_t ipc);
* @return Returns an error code (SC_ERR_NONE = success).
*/
sc_err_t sc_timer_get_wdog_status(sc_ipc_t ipc,
- sc_timer_wdog_time_t *timeout, sc_timer_wdog_time_t *max_timeout,
- sc_timer_wdog_time_t *remaining_time);
+ sc_timer_wdog_time_t *timeout,
+ sc_timer_wdog_time_t *max_timeout,
+ sc_timer_wdog_time_t *remaining_time);
/*!
* This function gets the status of the watchdog of a partition. All
@@ -158,8 +165,10 @@ sc_err_t sc_timer_get_wdog_status(sc_ipc_t ipc,
*
* @return Returns an error code (SC_ERR_NONE = success).
*/
-sc_err_t sc_timer_pt_get_wdog_status(sc_ipc_t ipc, sc_rm_pt_t pt, sc_bool_t *enb,
- sc_timer_wdog_time_t *timeout, sc_timer_wdog_time_t *remaining_time);
+sc_err_t sc_timer_pt_get_wdog_status(sc_ipc_t ipc, sc_rm_pt_t pt,
+ sc_bool_t *enb,
+ sc_timer_wdog_time_t *timeout,
+ sc_timer_wdog_time_t *remaining_time);
/*!
* This function configures the action to be taken when a watchdog
@@ -179,7 +188,7 @@ sc_err_t sc_timer_pt_get_wdog_status(sc_ipc_t ipc, sc_rm_pt_t pt, sc_bool_t *enb
* - SC_ERR_LOCKED if the watchdog is locked
*/
sc_err_t sc_timer_set_wdog_action(sc_ipc_t ipc,
- sc_rm_pt_t pt, sc_timer_wdog_action_t action);
+ sc_rm_pt_t pt, sc_timer_wdog_action_t action);
/* @} */
@@ -208,7 +217,8 @@ sc_err_t sc_timer_set_wdog_action(sc_ipc_t ipc,
* - SC_ERR_NOACCESS if caller's partition cannot access SC_R_SYSTEM
*/
sc_err_t sc_timer_set_rtc_time(sc_ipc_t ipc, uint16_t year, uint8_t mon,
- uint8_t day, uint8_t hour, uint8_t min, uint8_t sec);
+ uint8_t day, uint8_t hour, uint8_t min,
+ uint8_t sec);
/*!
* This function gets the RTC time.
@@ -224,7 +234,8 @@ sc_err_t sc_timer_set_rtc_time(sc_ipc_t ipc, uint16_t year, uint8_t mon,
* @return Returns an error code (SC_ERR_NONE = success).
*/
sc_err_t sc_timer_get_rtc_time(sc_ipc_t ipc, uint16_t *year, uint8_t *mon,
- uint8_t *day, uint8_t *hour, uint8_t *min, uint8_t *sec);
+ uint8_t *day, uint8_t *hour, uint8_t *min,
+ uint8_t *sec);
/*!
* This function gets the RTC time in seconds since 1/1/1970.
@@ -256,7 +267,8 @@ sc_err_t sc_timer_get_rtc_sec1970(sc_ipc_t ipc, uint32_t *sec);
* - SC_ERR_PARM if invalid time/date parameters
*/
sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon,
- uint8_t day, uint8_t hour, uint8_t min, uint8_t sec);
+ uint8_t day, uint8_t hour, uint8_t min,
+ uint8_t sec);
/*!
* This function sets the RTC alarm (periodic mode).
@@ -339,8 +351,7 @@ sc_err_t sc_timer_set_sysctr_alarm(sc_ipc_t ipc, uint64_t ticks);
* Return errors:
* - SC_ERR_PARM if invalid time/date parameters
*/
-sc_err_t sc_timer_set_sysctr_periodic_alarm(sc_ipc_t ipc,
- uint64_t ticks);
+sc_err_t sc_timer_set_sysctr_periodic_alarm(sc_ipc_t ipc, uint64_t ticks);
/*!
* This function cancels the SYSCTR alarm.
@@ -358,7 +369,6 @@ sc_err_t sc_timer_cancel_sysctr_alarm(sc_ipc_t ipc);
/* @} */
-#endif /* SC_TIMER_API_H */
+#endif /* SC_TIMER_API_H */
/**@}*/
-
diff --git a/include/soc/imx8/sc/types.h b/include/soc/imx8/sc/types.h
index 6c7704e9d81b..a1326148bae0 100644
--- a/include/soc/imx8/sc/types.h
+++ b/include/soc/imx8/sc/types.h
@@ -18,163 +18,167 @@
/* Defines */
-#define SCFW_API_VERSION 100U
-
/*!
* @name Defines for common frequencies
*/
/*@{*/
-#define SC_32KHZ 32768U /* 32KHz */
-#define SC_10MHZ 10000000U /* 10MHz */
-#define SC_16MHZ 16000000U /* 16MHz */
-#define SC_20MHZ 20000000U /* 20MHz */
-#define SC_25MHZ 25000000U /* 25MHz */
-#define SC_27MHZ 27000000U /* 27MHz */
-#define SC_40MHZ 40000000U /* 40MHz */
-#define SC_45MHZ 45000000U /* 45MHz */
-#define SC_50MHZ 50000000U /* 50MHz */
-#define SC_60MHZ 60000000U /* 60MHz */
-#define SC_66MHZ 66666666U /* 66MHz */
-#define SC_74MHZ 74250000U /* 74.25MHz */
-#define SC_80MHZ 80000000U /* 80MHz */
-#define SC_83MHZ 83333333U /* 83MHz */
-#define SC_84MHZ 84375000U /* 84.37MHz */
-#define SC_100MHZ 100000000U /* 100MHz */
-#define SC_125MHZ 125000000U /* 125MHz */
-#define SC_133MHZ 133333333U /* 133MHz */
-#define SC_135MHZ 135000000U /* 135MHz */
-#define SC_150MHZ 150000000U /* 150MHz */
-#define SC_160MHZ 160000000U /* 160MHz */
-#define SC_166MHZ 166666666U /* 166MHz */
-#define SC_175MHZ 175000000U /* 175MHz */
-#define SC_180MHZ 180000000U /* 180MHz */
-#define SC_200MHZ 200000000U /* 200MHz */
-#define SC_250MHZ 250000000U /* 250MHz */
-#define SC_266MHZ 266666666U /* 266MHz */
-#define SC_300MHZ 300000000U /* 300MHz */
-#define SC_312MHZ 312500000U /* 312.5MHZ */
-#define SC_320MHZ 320000000U /* 320MHz */
-#define SC_325MHZ 325000000U /* 325MHz */
-#define SC_333MHZ 333333333U /* 333MHz */
-#define SC_350MHZ 350000000U /* 350MHz */
-#define SC_372MHZ 372000000U /* 372MHz */
-#define SC_375MHZ 375000000U /* 375MHz */
-#define SC_400MHZ 400000000U /* 400MHz */
-#define SC_500MHZ 500000000U /* 500MHz */
-#define SC_594MHZ 594000000U /* 594MHz */
-#define SC_625MHZ 625000000U /* 625MHz */
-#define SC_640MHZ 640000000U /* 640MHz */
-#define SC_648MHZ 648000000U /* 648MHz */
-#define SC_650MHZ 650000000U /* 650MHz */
-#define SC_667MHZ 666666667U /* 667MHz */
-#define SC_675MHZ 675000000U /* 675MHz */
-#define SC_700MHZ 700000000U /* 700MHz */
-#define SC_720MHZ 720000000U /* 720MHz */
-#define SC_750MHZ 750000000U /* 750MHz */
-#define SC_753MHZ 753000000U /* 753MHz */
-#define SC_793MHZ 793000000U /* 793MHz */
-#define SC_800MHZ 800000000U /* 800MHz */
-#define SC_850MHZ 850000000U /* 850MHz */
-#define SC_858MHZ 858000000U /* 858MHz */
-#define SC_900MHZ 900000000U /* 900MHz */
-#define SC_953MHZ 953000000U /* 953MHz */
-#define SC_963MHZ 963000000U /* 963MHz */
-#define SC_1000MHZ 1000000000U /* 1GHz */
-#define SC_1060MHZ 1060000000U /* 1.06GHz */
-#define SC_1068MHZ 1068000000U /* 1.068GHz */
-#define SC_1121MHZ 1121000000U /* 1.121GHz */
-#define SC_1173MHZ 1173000000U /* 1.173GHz */
-#define SC_1188MHZ 1188000000U /* 1.188GHz */
-#define SC_1260MHZ 1260000000U /* 1.26GHz */
-#define SC_1278MHZ 1278000000U /* 1.278GHz */
-#define SC_1280MHZ 1280000000U /* 1.28GHz */
-#define SC_1300MHZ 1300000000U /* 1.3GHz */
-#define SC_1313MHZ 1313000000U /* 1.313GHz */
-#define SC_1345MHZ 1345000000U /* 1.345GHz */
-#define SC_1400MHZ 1400000000U /* 1.4GHz */
-#define SC_1500MHZ 1500000000U /* 1.5GHz */
-#define SC_1600MHZ 1600000000U /* 1.6GHz */
-#define SC_1800MHZ 1800000000U /* 1.8GHz */
-#define SC_2000MHZ 2000000000U /* 2.0GHz */
-#define SC_2112MHZ 2112000000U /* 2.12GHz */
+#define SC_32KHZ 32768U /* 32KHz */
+#define SC_10MHZ 10000000U /* 10MHz */
+#define SC_16MHZ 16000000U /* 16MHz */
+#define SC_20MHZ 20000000U /* 20MHz */
+#define SC_25MHZ 25000000U /* 25MHz */
+#define SC_27MHZ 27000000U /* 27MHz */
+#define SC_40MHZ 40000000U /* 40MHz */
+#define SC_45MHZ 45000000U /* 45MHz */
+#define SC_50MHZ 50000000U /* 50MHz */
+#define SC_60MHZ 60000000U /* 60MHz */
+#define SC_66MHZ 66666666U /* 66MHz */
+#define SC_74MHZ 74250000U /* 74.25MHz */
+#define SC_80MHZ 80000000U /* 80MHz */
+#define SC_83MHZ 83333333U /* 83MHz */
+#define SC_84MHZ 84375000U /* 84.37MHz */
+#define SC_100MHZ 100000000U /* 100MHz */
+#define SC_114MHZ 114000000U /* 114MHz */
+#define SC_125MHZ 125000000U /* 125MHz */
+#define SC_133MHZ 133333333U /* 133MHz */
+#define SC_135MHZ 135000000U /* 135MHz */
+#define SC_150MHZ 150000000U /* 150MHz */
+#define SC_160MHZ 160000000U /* 160MHz */
+#define SC_166MHZ 166666666U /* 166MHz */
+#define SC_175MHZ 175000000U /* 175MHz */
+#define SC_180MHZ 180000000U /* 180MHz */
+#define SC_200MHZ 200000000U /* 200MHz */
+#define SC_250MHZ 250000000U /* 250MHz */
+#define SC_266MHZ 266666666U /* 266MHz */
+#define SC_300MHZ 300000000U /* 300MHz */
+#define SC_312MHZ 312500000U /* 312.5MHZ */
+#define SC_320MHZ 320000000U /* 320MHz */
+#define SC_325MHZ 325000000U /* 325MHz */
+#define SC_333MHZ 333333333U /* 333MHz */
+#define SC_350MHZ 350000000U /* 350MHz */
+#define SC_372MHZ 372000000U /* 372MHz */
+#define SC_375MHZ 375000000U /* 375MHz */
+#define SC_400MHZ 400000000U /* 400MHz */
+#define SC_465MHZ 465000000U /* 465MHz */
+#define SC_500MHZ 500000000U /* 500MHz */
+#define SC_594MHZ 594000000U /* 594MHz */
+#define SC_625MHZ 625000000U /* 625MHz */
+#define SC_640MHZ 640000000U /* 640MHz */
+#define SC_648MHZ 648000000U /* 648MHz */
+#define SC_650MHZ 650000000U /* 650MHz */
+#define SC_667MHZ 666666667U /* 667MHz */
+#define SC_675MHZ 675000000U /* 675MHz */
+#define SC_700MHZ 700000000U /* 700MHz */
+#define SC_720MHZ 720000000U /* 720MHz */
+#define SC_750MHZ 750000000U /* 750MHz */
+#define SC_753MHZ 753000000U /* 753MHz */
+#define SC_793MHZ 793000000U /* 793MHz */
+#define SC_800MHZ 800000000U /* 800MHz */
+#define SC_850MHZ 850000000U /* 850MHz */
+#define SC_858MHZ 858000000U /* 858MHz */
+#define SC_900MHZ 900000000U /* 900MHz */
+#define SC_953MHZ 953000000U /* 953MHz */
+#define SC_963MHZ 963000000U /* 963MHz */
+#define SC_1000MHZ 1000000000U /* 1GHz */
+#define SC_1060MHZ 1060000000U /* 1.06GHz */
+#define SC_1068MHZ 1068000000U /* 1.068GHz */
+#define SC_1121MHZ 1121000000U /* 1.121GHz */
+#define SC_1173MHZ 1173000000U /* 1.173GHz */
+#define SC_1188MHZ 1188000000U /* 1.188GHz */
+#define SC_1260MHZ 1260000000U /* 1.26GHz */
+#define SC_1278MHZ 1278000000U /* 1.278GHz */
+#define SC_1280MHZ 1280000000U /* 1.28GHz */
+#define SC_1300MHZ 1300000000U /* 1.3GHz */
+#define SC_1313MHZ 1313000000U /* 1.313GHz */
+#define SC_1345MHZ 1345000000U /* 1.345GHz */
+#define SC_1400MHZ 1400000000U /* 1.4GHz */
+#define SC_1500MHZ 1500000000U /* 1.5GHz */
+#define SC_1600MHZ 1600000000U /* 1.6GHz */
+#define SC_1800MHZ 1800000000U /* 1.8GHz */
+#define SC_1860MHZ 1860000000U /* 1.86GHz */
+#define SC_2000MHZ 2000000000U /* 2.0GHz */
+#define SC_2112MHZ 2112000000U /* 2.12GHz */
/*@}*/
/*!
* @name Defines for 24M related frequencies
*/
/*@{*/
-#define SC_8MHZ 8000000U /* 8MHz */
-#define SC_12MHZ 12000000U /* 12MHz */
-#define SC_19MHZ 19800000U /* 19.8MHz */
-#define SC_24MHZ 24000000U /* 24MHz */
-#define SC_48MHZ 48000000U /* 48MHz */
-#define SC_120MHZ 120000000U /* 120MHz */
-#define SC_132MHZ 132000000U /* 132MHz */
-#define SC_144MHZ 144000000U /* 144MHz */
-#define SC_192MHZ 192000000U /* 192MHz */
-#define SC_211MHZ 211200000U /* 211.2MHz */
-#define SC_240MHZ 240000000U /* 240MHz */
-#define SC_264MHZ 264000000U /* 264MHz */
-#define SC_352MHZ 352000000U /* 352MHz */
-#define SC_360MHZ 360000000U /* 360MHz */
-#define SC_384MHZ 384000000U /* 384MHz */
-#define SC_396MHZ 396000000U /* 396MHz */
-#define SC_432MHZ 432000000U /* 432MHz */
-#define SC_480MHZ 480000000U /* 480MHz */
-#define SC_600MHZ 600000000U /* 600MHz */
-#define SC_744MHZ 744000000U /* 744MHz */
-#define SC_792MHZ 792000000U /* 792MHz */
-#define SC_864MHZ 864000000U /* 864MHz */
-#define SC_960MHZ 960000000U /* 960MHz */
-#define SC_1056MHZ 1056000000U /* 1056MHz */
-#define SC_1104MHZ 1104000000U /* 1104MHz */
-#define SC_1200MHZ 1200000000U /* 1.2GHz */
-#define SC_1464MHZ 1464000000U /* 1.464GHz */
-#define SC_2400MHZ 2400000000U /* 2.4GHz */
+#define SC_8MHZ 8000000U /* 8MHz */
+#define SC_12MHZ 12000000U /* 12MHz */
+#define SC_19MHZ 19800000U /* 19.8MHz */
+#define SC_24MHZ 24000000U /* 24MHz */
+#define SC_48MHZ 48000000U /* 48MHz */
+#define SC_120MHZ 120000000U /* 120MHz */
+#define SC_132MHZ 132000000U /* 132MHz */
+#define SC_144MHZ 144000000U /* 144MHz */
+#define SC_192MHZ 192000000U /* 192MHz */
+#define SC_211MHZ 211200000U /* 211.2MHz */
+#define SC_228MHZ 228000000U /* 233MHz */
+#define SC_240MHZ 240000000U /* 240MHz */
+#define SC_264MHZ 264000000U /* 264MHz */
+#define SC_352MHZ 352000000U /* 352MHz */
+#define SC_360MHZ 360000000U /* 360MHz */
+#define SC_384MHZ 384000000U /* 384MHz */
+#define SC_396MHZ 396000000U /* 396MHz */
+#define SC_432MHZ 432000000U /* 432MHz */
+#define SC_456MHZ 456000000U /* 466MHz */
+#define SC_480MHZ 480000000U /* 480MHz */
+#define SC_600MHZ 600000000U /* 600MHz */
+#define SC_744MHZ 744000000U /* 744MHz */
+#define SC_792MHZ 792000000U /* 792MHz */
+#define SC_864MHZ 864000000U /* 864MHz */
+#define SC_912MHZ 912000000U /* 912MHz */
+#define SC_960MHZ 960000000U /* 960MHz */
+#define SC_1056MHZ 1056000000U /* 1056MHz */
+#define SC_1104MHZ 1104000000U /* 1104MHz */
+#define SC_1200MHZ 1200000000U /* 1.2GHz */
+#define SC_1464MHZ 1464000000U /* 1.464GHz */
+#define SC_2400MHZ 2400000000U /* 2.4GHz */
/*@}*/
/*!
* @name Defines for A/V related frequencies
*/
/*@{*/
-#define SC_62MHZ 62937500U /* 62.9375MHz */
-#define SC_755MHZ 755250000U /* 755.25MHz */
+#define SC_62MHZ 62937500U /* 62.9375MHz */
+#define SC_755MHZ 755250000U /* 755.25MHz */
/*@}*/
/*!
* @name Defines for type widths
*/
/*@{*/
-#define SC_BOOL_W 1U /* Width of sc_bool_t */
-#define SC_ERR_W 4U /* Width of sc_err_t */
-#define SC_RSRC_W 10U /* Width of sc_rsrc_t */
-#define SC_CTRL_W 6U /* Width of sc_ctrl_t */
+#define SC_BOOL_W 1U /* Width of sc_bool_t */
+#define SC_ERR_W 4U /* Width of sc_err_t */
+#define SC_RSRC_W 10U /* Width of sc_rsrc_t */
+#define SC_CTRL_W 6U /* Width of sc_ctrl_t */
/*@}*/
/*!
* @name Defines for sc_bool_t
*/
/*@{*/
-#define SC_FALSE ((sc_bool_t) 0U) /* False */
-#define SC_TRUE ((sc_bool_t) 1U) /* True */
+#define SC_FALSE ((sc_bool_t) 0U) /* False */
+#define SC_TRUE ((sc_bool_t) 1U) /* True */
/*@}*/
/*!
* @name Defines for sc_err_t.
*/
/*@{*/
-#define SC_ERR_NONE 0U /* Success */
-#define SC_ERR_VERSION 1U /* Incompatible API version */
-#define SC_ERR_CONFIG 2U /* Configuration error */
-#define SC_ERR_PARM 3U /* Bad parameter */
-#define SC_ERR_NOACCESS 4U /* Permission error (no access) */
-#define SC_ERR_LOCKED 5U /* Permission error (locked) */
-#define SC_ERR_UNAVAILABLE 6U /* Unavailable (out of resources) */
-#define SC_ERR_NOTFOUND 7U /* Not found */
-#define SC_ERR_NOPOWER 8U /* No power */
-#define SC_ERR_IPC 9U /* Generic IPC error */
-#define SC_ERR_BUSY 10U /* Resource is currently busy/active */
-#define SC_ERR_FAIL 11U /* General I/O failure */
+#define SC_ERR_NONE 0U /* Success */
+#define SC_ERR_VERSION 1U /* Incompatible API version */
+#define SC_ERR_CONFIG 2U /* Configuration error */
+#define SC_ERR_PARM 3U /* Bad parameter */
+#define SC_ERR_NOACCESS 4U /* Permission error (no access) */
+#define SC_ERR_LOCKED 5U /* Permission error (locked) */
+#define SC_ERR_UNAVAILABLE 6U /* Unavailable (out of resources) */
+#define SC_ERR_NOTFOUND 7U /* Not found */
+#define SC_ERR_NOPOWER 8U /* No power */
+#define SC_ERR_IPC 9U /* Generic IPC error */
+#define SC_ERR_BUSY 10U /* Resource is currently busy/active */
+#define SC_ERR_FAIL 11U /* General I/O failure */
#define SC_ERR_LAST 12U
/*@}*/
@@ -208,12 +212,12 @@
#define SC_R_PERF 23U
#define SC_R_USB_1_PHY 24U
#define SC_R_DC_0_WARP 25U
-#define SC_R_UNUSED7 26U
-#define SC_R_UNUSED8 27U
+#define SC_R_V2X_MU_0 26U
+#define SC_R_V2X_MU_1 27U
#define SC_R_DC_0_VIDEO0 28U
#define SC_R_DC_0_VIDEO1 29U
#define SC_R_DC_0_FRAC0 30U
-#define SC_R_UNUSED6 31U
+#define SC_R_V2X_MU_2 31U
#define SC_R_DC_0 32U
#define SC_R_GPU_2_PID0 33U
#define SC_R_DC_0_PLL_0 34U
@@ -222,11 +226,11 @@
#define SC_R_DC_1_BLIT1 37U
#define SC_R_DC_1_BLIT2 38U
#define SC_R_DC_1_BLIT_OUT 39U
-#define SC_R_UNUSED9 40U
-#define SC_R_UNUSED10 41U
+#define SC_R_V2X_MU_3 40U
+#define SC_R_V2X_MU_4 41U
#define SC_R_DC_1_WARP 42U
-#define SC_R_UNUSED11 43U
-#define SC_R_UNUSED12 44U
+#define SC_R_TBU_CTL 43U
+#define SC_R_SECVIO 44U
#define SC_R_DC_1_VIDEO0 45U
#define SC_R_DC_1_VIDEO1 46U
#define SC_R_DC_1_FRAC0 47U
@@ -322,10 +326,10 @@
#define SC_R_DMA_1_CH29 137U
#define SC_R_DMA_1_CH30 138U
#define SC_R_DMA_1_CH31 139U
-#define SC_R_UNUSED1 140U
-#define SC_R_UNUSED2 141U
-#define SC_R_UNUSED3 142U
-#define SC_R_UNUSED4 143U
+#define SC_R_V2X_PID0 140U
+#define SC_R_V2X_PID1 141U
+#define SC_R_V2X_PID2 142U
+#define SC_R_V2X_PID3 143U
#define SC_R_GPU_0_PID0 144U
#define SC_R_GPU_0_PID1 145U
#define SC_R_GPU_0_PID2 146U
@@ -472,8 +476,8 @@
#define SC_R_M4_0_UART 287U
#define SC_R_M4_0_I2C 288U
#define SC_R_M4_0_INTMUX 289U
-#define SC_R_UNUSED15 290U
-#define SC_R_UNUSED16 291U
+#define SC_R_ENET_0_A0 290U
+#define SC_R_ENET_0_A1 291U
#define SC_R_M4_0_MU_0B 292U
#define SC_R_M4_0_MU_0A0 293U
#define SC_R_M4_0_MU_0A1 294U
@@ -548,12 +552,12 @@
#define SC_R_VPU_PID5 363U
#define SC_R_VPU_PID6 364U
#define SC_R_VPU_PID7 365U
-#define SC_R_VPU_UART 366U
-#define SC_R_VPUCORE 367U
-#define SC_R_VPUCORE_0 368U
-#define SC_R_VPUCORE_1 369U
-#define SC_R_VPUCORE_2 370U
-#define SC_R_VPUCORE_3 371U
+#define SC_R_ENET_0_A2 366U
+#define SC_R_ENET_1_A0 367U
+#define SC_R_ENET_1_A1 368U
+#define SC_R_ENET_1_A2 369U
+#define SC_R_ENET_1_A3 370U
+#define SC_R_ENET_1_A4 371U
#define SC_R_DMA_4_CH0 372U
#define SC_R_DMA_4_CH1 373U
#define SC_R_DMA_4_CH2 374U
@@ -729,7 +733,7 @@
#define SC_R_DMA_5_CH3 544U
#define SC_R_ATTESTATION 545U
#define SC_R_LAST 546U
-#define SC_R_ALL ((sc_rsrc_t) UINT16_MAX) /* All resources */
+#define SC_R_ALL ((sc_rsrc_t) UINT16_MAX) /* All resources */
/*@}*/
/*!
@@ -741,7 +745,7 @@
/* NOTE - please add by replacing some of the UNUSED from above! */
/*!
- * Defnes for sc_ctrl_t.
+ * Defines for sc_ctrl_t.
*/
#define SC_C_TEMP 0U
#define SC_C_TEMP_HI 1U
@@ -799,9 +803,11 @@
#define SC_C_IPG_STOP_MODE 53U
#define SC_C_IPG_STOP_ACK 54U
#define SC_C_SYNC_CTRL 55U
-#define SC_C_LAST 56U
+#define SC_C_OFS_AUDIO_ALT 56U
+#define SC_C_DSP_BYP 57U
+#define SC_C_LAST 58U
-#define SC_P_ALL ((sc_pad_t) UINT16_MAX) /* All pads */
+#define SC_P_ALL ((sc_pad_t) UINT16_MAX) /* All pads */
/* Types */
@@ -842,46 +848,45 @@ typedef uint16_t sc_pad_t;
/* Extra documentation of standard types */
#ifdef DOXYGEN
-/*!
- * Type used to declare an 8-bit integer.
- */
+ /*!
+ * Type used to declare an 8-bit integer.
+ */
typedef __INT8_TYPE__ int8_t;
-/*!
- * Type used to declare a 16-bit integer.
- */
+ /*!
+ * Type used to declare a 16-bit integer.
+ */
typedef __INT16_TYPE__ int16_t;
-/*!
- * Type used to declare a 32-bit integer.
- */
+ /*!
+ * Type used to declare a 32-bit integer.
+ */
typedef __INT32_TYPE__ int32_t;
-/*!
- * Type used to declare a 64-bit integer.
- */
+ /*!
+ * Type used to declare a 64-bit integer.
+ */
typedef __INT64_TYPE__ int64_t;
-/*!
- * Type used to declare an 8-bit unsigned integer.
- */
+ /*!
+ * Type used to declare an 8-bit unsigned integer.
+ */
typedef __UINT8_TYPE__ uint8_t;
-/*!
- * Type used to declare a 16-bit unsigned integer.
- */
+ /*!
+ * Type used to declare a 16-bit unsigned integer.
+ */
typedef __UINT16_TYPE__ uint16_t;
-/*!
- * Type used to declare a 32-bit unsigned integer.
- */
+ /*!
+ * Type used to declare a 32-bit unsigned integer.
+ */
typedef __UINT32_TYPE__ uint32_t;
-/*!
- * Type used to declare a 64-bit unsigned integer.
- */
+ /*!
+ * Type used to declare a 64-bit unsigned integer.
+ */
typedef __UINT64_TYPE__ uint64_t;
#endif
-#endif /* SC_TYPES_H */
-
+#endif /* SC_TYPES_H */
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-16 02:59:57 +0000