diff options
| author | Mark Brown <broonie@kernel.org> | 2015-10-26 11:15:57 +0900 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-10-26 11:15:57 +0900 |
| commit | b27aafedfdef2507de79a8a9b95f6aa815ba696c (patch) | |
| tree | 39f29c56587d376bbb29ac12b36364fd5784a617 /include/sound | |
| parent | 12e7b4a4f3096fcb93b222ba644e975ffcf4f21b (diff) | |
| parent | 1d387a3fd86f2acf70803262c5a5a5a89df0e097 (diff) | |
Merge remote-tracking branch 'asoc/topic/doc' into asoc-next
Diffstat (limited to 'include/sound')
| -rw-r--r-- | include/sound/soc-dai.h | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index 238200ffba5b..212eaaf172ed 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h @@ -48,10 +48,25 @@ struct snd_compr_stream; #define SND_SOC_DAIFMT_GATED (0 << 4) /* clock is gated */ /* - * DAI hardware signal inversions. + * DAI hardware signal polarity. * * Specifies whether the DAI can also support inverted clocks for the specified * format. + * + * BCLK: + * - "normal" polarity means signal is available at rising edge of BCLK + * - "inverted" polarity means signal is available at falling edge of BCLK + * + * FSYNC "normal" polarity depends on the frame format: + * - I2S: frame consists of left then right channel data. Left channel starts + * with falling FSYNC edge, right channel starts with rising FSYNC edge. + * - Left/Right Justified: frame consists of left then right channel data. + * Left channel starts with rising FSYNC edge, right channel starts with + * falling FSYNC edge. + * - DSP A/B: Frame starts with rising FSYNC edge. + * - AC97: Frame starts with rising FSYNC edge. + * + * "Negative" FSYNC polarity is the one opposite of "normal" polarity. */ #define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bit clock + frame */ #define SND_SOC_DAIFMT_NB_IF (2 << 8) /* normal BCLK + inv FRM */ |