diff options
| author | Krzysztof Helt <krzysztof.h1@wp.pl> | 2009-03-31 15:25:08 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-04-01 08:59:27 -0700 |
| commit | 1b48cb563d59e03dbf530174f30c0ed3b6fba513 (patch) | |
| tree | cef000929c4366c6a92b5456981a88a41e461d4f /include/video/cirrus.h | |
| parent | 48c329e906f834711906ab4b0986ea0e857aff16 (diff) | |
cirrusfb: Laguna chipset 8bpp fix
Fix 8bpp mode by adding handling of the Laguna chipsets to various places
and stop trashing a HDR register which probably does not exist on the
Laguna.
Fix compilation warnings about uninitialized variables also.
Finally, all 8bpp, 16bpp and 32bpp modes work on the Laguna chipset.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/video/cirrus.h')
| -rw-r--r-- | include/video/cirrus.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/video/cirrus.h b/include/video/cirrus.h index a1b7985b6b27..9a5e9ee30782 100644 --- a/include/video/cirrus.h +++ b/include/video/cirrus.h @@ -32,7 +32,6 @@ #define CL_VSSM2 0x3c3 /* Motherboard Sleep */ /*** VGA Sequencer Registers ***/ -#define CL_SEQR0 0x0 /* Reset */ /* the following are from the "extension registers" group */ #define CL_SEQR6 0x6 /* Unlock ALL Extensions */ #define CL_SEQR7 0x7 /* Extended Sequencer Mode */ |