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authorMitch Luban <mluban@nvidia.com>2014-01-11 14:20:59 -0800
committerMitch Luban <mluban@nvidia.com>2014-01-16 19:02:16 -0800
commit79a02c2cceaab620c56447a79e1386730d656128 (patch)
tree09b01c403ad7b79c2337c4f5157cd22033997cf5 /include
parentfa03ac2d34329361c29fa036fa433b50f25bb82d (diff)
arm: tegra: fix e1780 emc dvfs table
2GB emc dvfs table was using 4GB table add latency register to e1780 emc tables. Bug 1340913 Reviewed-on: http://git-master/r/354768 (cherry picked from commit eab2732013e388453fb8af98b76164ec2bdba6f2) Change-Id: I0bd5ff7a5795f75b7c961cb67ad856b250f3d929 Signed-off-by: Mitch Luban <mluban@nvidia.com> Reviewed-on: http://git-master/r/354770 GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'include')
-rw-r--r--include/linux/platform_data/tegra_emc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/platform_data/tegra_emc.h b/include/linux/platform_data/tegra_emc.h
index fcb64cfbf606..adb8d690bd7d 100644
--- a/include/linux/platform_data/tegra_emc.h
+++ b/include/linux/platform_data/tegra_emc.h
@@ -186,6 +186,7 @@ struct tegra12_emc_table {
u32 emc_mode_1;
u32 emc_mode_2;
u32 emc_mode_4;
+ u32 clock_change_latency;
};
struct tegra12_emc_pdata {