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authorRichard Zhu <r65037@freescale.com>2013-10-12 15:25:58 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-09-17 08:58:07 -0500
commitc312f123204bf4004052e3c1467c40f59b45c73e (patch)
tree3b2d9418720b47299ddc88686453f5290040e3b3 /include
parent1a14042b557526d7b4e90fb401aeaa1f59a81802 (diff)
ENGR00285671 mmc: setup emmc boot partition configure methods
- Configure boot partition Expose the interfaces that used to enable the configurations of the boot mode of the eMMC cards. usage how-to and examples: Enable the boot partition 1 boot enabled. "echo 8 > /sys/devices/soc0/soc.1/2100000.aips-bus/ 219c000.usdhc/mmc_host/mmc2/mmc2\:0001/boot_config" In order to make sure that the re-read the ext-csd of card can be completed successfully, add the method to wait for the finish of the busy state. - setup boot_info message output Output bit means of important esd_csd register Read esd_csd info each time when cat boot_info becasue user may change config affect esd_csd value. - Boot partition access howto: About the details, please refer to the guidance of Documentation/mmc/mmc-dev-parts.txt To enable write access to /dev/mmcblkXbootY, disable the forced read-only access with: echo 0 > /sys/block/mmcblkXbootY/force_ro To re-enable read-only access: echo 1 > /sys/block/mmcblkXbootY/force_ro NOTE: - The definitions of the EXT_CSD_PART_CONFIG and EXT_CSD_BOOT_BUS_WIDTH +------------------------------------------------------------+ | Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 | |------|----------|-----------------------|------------------| | X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS | +------------------------------------------------------------+ Bit7: Reserved Bit6: always set to vaule '1' when boot_part is enabled Bit[5:3]: 0x0 : Device not boot enabled (default) 0x1 : Boot partition 1 enabled for boot 0x2 : Boot partition 2 enabled for boot 0x7 : User area enabled for boot Bit[2:0]: 0x0 : No access to boot partition (default) 0x1 : R/W boot partition 1 0x2 : R/W boot partition 2 +--------------------------------------------------------------------+ | Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 | |----------------|----------------------------------|----------------| | X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH | +--------------------------------------------------------------------+ Bit [4:3] : BOOT_MODE (non-volatile) 0x0 : Use single data rate + backward compatible timings in boot operation (default) 0x1 : Use single data rate + high speed timings in boot operation mode 0x2 : Use dual data rate in boot operation 0x3 : Reserved Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile) 0x0 : Reset bus width to x1, single data rate and backward compatible timings after boot operation (default) 0x1 : Retain boot bus width and boot mode after boot operation Bit[1:0] : BOOT_BUS_WIDTH (non-volatile) 0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default) 0x1 : x4 (sdr/ddr) bus width in boot operation mode 0x2 : x8 (sdr/ddr) bus width in boot operation mode 0x3 : Reserved - example of the boot_info: boot_info:0x07; ALT_BOOT_MODE:1 - Supports alternate boot method DDR_BOOT_MODE:1 - Supports alternate dual data rate during boot HS_BOOTMODE:1 - Supports high speed timing during boot boot_size:2048KB boot_partition:0x48; BOOT_ACK:1 - Boot acknowledge sent during boot operation BOOT_PARTITION-ENABLE: 1 - Boot partition 1 enabled PARTITION_ACCESS:0 - No access to boot partition boot_bus:0x00 BOOT_MODE:0 - Use single data rate + backward compatible timings in boot operation RESET_BOOT_BUS_WIDTH:0 - Reset bus width to x1, single data rate and backwardcompatible timings after boot operation BOOT_BUS_WIDTH:0 - x1 (sdr) or x4 (ddr) bus width in boot operation mode Signed-off-by: Richard Zhu <r65037@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mmc/card.h4
-rw-r--r--include/linux/mmc/mmc.h25
2 files changed, 29 insertions, 0 deletions
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index b73027298b3a..1b004cc96607 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -86,10 +86,13 @@ struct mmc_ext_csd {
unsigned int data_sector_size; /* 512 bytes or 4KB */
unsigned int data_tag_unit_size; /* DATA TAG UNIT size */
unsigned int boot_ro_lock; /* ro lock support */
+ unsigned int boot_size;
bool boot_ro_lockable;
u8 raw_exception_status; /* 54 */
u8 raw_partition_support; /* 160 */
u8 raw_rpmb_size_mult; /* 168 */
+ u8 boot_bus_width; /* 177 */
+ u8 boot_config; /* 179 */
u8 raw_erased_mem_count; /* 181 */
u8 raw_ext_csd_structure; /* 194 */
u8 raw_card_type; /* 196 */
@@ -102,6 +105,7 @@ struct mmc_ext_csd {
u8 raw_hc_erase_gap_size; /* 221 */
u8 raw_erase_timeout_mult; /* 223 */
u8 raw_hc_erase_grp_size; /* 224 */
+ u8 boot_info; /* 228 */
u8 raw_sec_trim_mult; /* 229 */
u8 raw_sec_erase_mult; /* 230 */
u8 raw_sec_feature_support;/* 231 */
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 50bcde3677ca..8c91ac817d8f 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -292,6 +292,7 @@ struct _mmc_csd {
#define EXT_CSD_RPMB_MULT 168 /* RO */
#define EXT_CSD_BOOT_WP 173 /* R/W */
#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
+#define EXT_CSD_BOOT_BUS_WIDTH 177 /* R/W */
#define EXT_CSD_PART_CONFIG 179 /* R/W */
#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
@@ -313,6 +314,7 @@ struct _mmc_csd {
#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */
#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
#define EXT_CSD_BOOT_MULT 226 /* RO */
+#define EXT_CSD_BOOT_INFO 228 /* RO, 1 bytes */
#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */
#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */
#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */
@@ -378,6 +380,29 @@ struct _mmc_csd {
#define EXT_CSD_SEC_GB_CL_EN BIT(4)
#define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */
+#define EXT_CSD_BOOT_BUS_WIDTH_MASK (0x1F)
+#define EXT_CSD_BOOT_BUS_WIDTH_MODE_MASK (0x3 << 3)
+#define EXT_CSD_BOOT_BUS_WIDTH_MODE_SDR_NORMAL (0x0)
+#define EXT_CSD_BOOT_BUS_WIDTH_MODE_SDR_HIGH (0x1)
+#define EXT_CSD_BOOT_BUS_WIDTH_MODE_DDR (0x2)
+#define EXT_CSD_BOOT_BUS_WIDTH_RST_WIDTH (1 << 2)
+#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH_MASK (0x3)
+#define EXT_CSD_BOOT_BUS_WIDTH_1_SDR_4_DDR (0x0)
+#define EXT_CSD_BOOT_BUS_WIDTH_4_SDR_4_DDR (0x1)
+#define EXT_CSD_BOOT_BUS_WIDTH_8_SDR_8_DDR (0x2)
+
+#define EXT_CSD_BOOT_ACK_ENABLE (0x1 << 6)
+#define EXT_CSD_BOOT_PARTITION_ENABLE_MASK (0x7 << 3)
+#define EXT_CSD_BOOT_PARTITION_DISABLE (0x0)
+#define EXT_CSD_BOOT_PARTITION_PART1 (0x1 << 3)
+#define EXT_CSD_BOOT_PARTITION_PART2 (0x2 << 3)
+#define EXT_CSD_BOOT_PARTITION_USER (0x7 << 3)
+
+#define EXT_CSD_BOOT_PARTITION_ACCESS_MASK (0x7)
+#define EXT_CSD_BOOT_PARTITION_ACCESS_DISABLE (0x0)
+#define EXT_CSD_BOOT_PARTITION_ACCESS_PART1 (0x1)
+#define EXT_CSD_BOOT_PARTITION_ACCESS_PART2 (0x2)
+
#define EXT_CSD_RST_N_EN_MASK 0x3
#define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */