diff options
author | Alan Tull <alan.tull@freescale.com> | 2011-12-08 13:43:42 -0600 |
---|---|---|
committer | Jason Liu <r64343@freescale.com> | 2012-01-09 21:11:36 +0800 |
commit | ec1f85521053f7dde403b114d3b57dbd03502612 (patch) | |
tree | 5074a1e04c68803f5e914f19afb86981d89248b3 /include | |
parent | 9db2cba9f754b93938ef1c7af02b31c4250b99f1 (diff) |
ENGR00169872-2 rework hdmi initialization and hotplug sequence
This commit intends to implement the flowchart and details
documented in the HDMI Transmitter Controller User Guide
section entitled "Programming Model".
Some input is also from the Synopsys API code.
The HDMI specification requires HDMI to set itself to VGA DVI mode
before reading the EDID.
So follow this sequence when HDMI is hotplugged:
1. Hdmi connector is plugged in, HDMI video gets an interrupt.
2. Clear out video mode list. Add only VGA DVI mode to list.
3. Request VGA DVI mode (call fb_set_var())
4. HDMI video driver will get FB_EVENT_MODE_CHANGE callback and
call mxc_hdmi_setup() to set up HDMI.
5. Read the edid and add video modes from edid. Select the video
mode that is similar to the command line default.
6. Request VGA DVI mode (call fb_set_var())
7. HDMI video driver will get FB_EVENT_MODE_CHANGE callback and
do mxc_hdmi_setup().
Also included is a workaround for an overflow condition in the HDMI.
The frame composer has an arithmetic unit that gets updated every time
we write to one of the FC registers. But sometimes, depending on the
relation between the tmds and sfr clocks, it may happen that this unit
doesn't get updated, even though the registers are holding correct
values. The workaround for this is, after completing the controller
configuration, to rewrite one of the FC registers (i.e. FC_INVIDCONF)
three or four times with the same value, and then follow it up by a SW
reset to the TMDS clock domain (MC_SWRSTZ).
We clear the overflow condition as described above every time we
change video mode. Also an overflow interupt handler will clear the
overflow condition if it happens again. This overflow condition is
expected (and not a problem) when we are in DVI (non-HDMI) mode, so
we do not worry about it in that case.
Signed-off-by: Alan Tull <alan.tull@freescale.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mfd/mxc-hdmi-core.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/linux/mfd/mxc-hdmi-core.h b/include/linux/mfd/mxc-hdmi-core.h index f449946a50f6..8c6ce456ddad 100644 --- a/include/linux/mfd/mxc-hdmi-core.h +++ b/include/linux/mfd/mxc-hdmi-core.h @@ -22,16 +22,21 @@ #define IRQ_DISABLE_SUCCEED 0 #define IRQ_DISABLE_FAIL 1 +bool hdmi_check_overflow(void); + u8 hdmi_readb(unsigned int reg); void hdmi_writeb(u8 value, unsigned int reg); void hdmi_mask_writeb(u8 data, unsigned int addr, u8 shift, u8 mask); unsigned int hdmi_read4(unsigned int reg); void hdmi_write4(unsigned int value, unsigned int reg); + void hdmi_irq_init(void); void hdmi_irq_enable(int irq); unsigned int hdmi_irq_disable(int irq); + void hdmi_set_sample_rate(unsigned int rate); -void hdmi_set_clk_regenerator(void); +void hdmi_init_clk_regenerator(void); +void hdmi_clk_regenerator_update_pixel_clock(void); extern int mxc_hdmi_ipu_id; extern int mxc_hdmi_disp_id; |