diff options
| author | Nicolin Chen <b42378@freescale.com> | 2013-09-25 18:22:33 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2013-10-30 09:55:50 +0800 |
| commit | 3e94a9a0e305518135c373d9cacf7da2b527bd40 (patch) | |
| tree | 34f032f89409e3e8d70ebec3b10a59755af81aa7 /include | |
| parent | c18bf00085048c2d373791c5a13e8bfa4b5f3321 (diff) | |
ENGR00280852-7 mxc: asrc: Only set ASRC to STALL level in start_conv()
We don't need to set ASRC to STALL level everytime, instead we only need
to do that at the beginning. If we insert null data into input fifo during
the sequence of valid datas, there would be a noise occur to it.
By doing this, we can assure ASRC would keep each period's perturbation of
output dma task within 8 sample sizes, which is the default value for last
period number. Thus we don't need to expand the last period number any more.
This patch also dropped some unused functions since the driver no long needs
them and replaced wrapped function for channel number configuration with direct
regmap_update_bits() to make the driver clean.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mxc_asrc.h | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/include/linux/mxc_asrc.h b/include/linux/mxc_asrc.h index b9faaa207fc5..5f71a5797264 100644 --- a/include/linux/mxc_asrc.h +++ b/include/linux/mxc_asrc.h @@ -134,12 +134,10 @@ #define ASRIER_ADIE(x) (1 << ASRIER_ADIEx_SHIFT(x)) /* REG2 0x0C REG_ASRCNCR */ -#define ASRCNCR_ANCA_MASK(b) ((1 << b) - 1) -#define ASRCNCR_ANCA_get(v, b) (v & ASRCNCR_ANCA_MASK(b)) -#define ASRCNCR_ANCB_MASK(b) (((1 << b) - 1) << b) -#define ASRCNCR_ANCB_get(v, b) ((v & ASRCNCR_ANCB_MASK(b)) >> b) -#define ASRCNCR_ANCC_MASK(b) (((1 << b) - 1) << (b << 1)) -#define ASRCNCR_ANCC_get(v, b) ((v & ASRCNCR_ANCC_MASK(b)) >> (b << 1)) +#define ASRCNCR_ANCx_SHIFT(x, b) (b * x) +#define ASRCNCR_ANCx_MASK(x, b) (((1 << b) - 1) << ASRCNCR_ANCx_SHIFT(x, b)) +#define ASRCNCR_ANCx_get(x, v, b) ((v & ASRCNCR_ANCx_MASK(x, b)) >> ASRCNCR_ANCx_SHIFT(x, b)) +#define ASRCNCR_ANCx_set(x, v, b) ((v << ASRCNCR_ANCx_SHIFT(x, b)) & ASRCNCR_ANCx_MASK(x, b)) /* REG3 0x10 REG_ASRCFG */ #define ASRCFG_INIRQx_SHIFT(x) (21 + x) |