diff options
| author | Richard Zhu <Richard.Zhu@freescale.com> | 2015-03-13 16:24:11 +0800 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:20:42 +0300 |
| commit | 816fe40d3c88197d28a994c1096da0409deb44c0 (patch) | |
| tree | 61cc8daa23c611c71aa48949198ebcb3b655e919 /include | |
| parent | ed13df1818c00afa141e9f1fdf982fe25cd8b09d (diff) | |
MLK-10466-2 ARM: imx: add the pcie related macros definitions
add the pcie related macros definitions into gpr.
Signed-off-by: Richard Zhu <Richard.Zhu@freescale.com>
(cherry picked from commit b4a5b2e53b2e743824d0af7428f7d9d406bec8bd)
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index fe95e713957b..7eb2848b2122 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -101,6 +101,7 @@ #define IMX6Q_GPR1_PCIE_ENTER_L1 BIT(26) #define IMX6Q_GPR1_MIPI_COLOR_SW BIT(25) #define IMX6Q_GPR1_DPI_OFF BIT(24) +#define IMX6Q_GPR1_PCIE_SW_PERST BIT(23) #define IMX6Q_GPR1_EXC_MON_MASK BIT(22) #define IMX6Q_GPR1_EXC_MON_OKAY 0x0 #define IMX6Q_GPR1_EXC_MON_SLVE BIT(22) @@ -317,6 +318,7 @@ #define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26) #define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25) #define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24) +#define IMX6Q_GPR12_PCIE_PM_TURN_OFF BIT(16) #define IMX6Q_GPR12_DEVICE_TYPE (0xf << 12) #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) #define IMX6Q_GPR12_LOS_LEVEL (0x1f << 4) |