diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2013-10-15 12:36:42 -0500 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2013-10-30 09:55:58 +0800 |
| commit | a25e49ff3dc65a43b1ff67d31bec1042d2e8e230 (patch) | |
| tree | f840444df82564a077e0c3a60ae9801ede627bb3 /include | |
| parent | 7dc7a66ad2722fe4d239a1d292c548be96fd8558 (diff) | |
ENGR00281769 [iMX6SL] Allow uart to be sourced from 24MHz XTAL
In order to optmize low power IDLE numbers all PLLs should be in bypass.
On imx6sl, UART can be sourced directly from the 24MHz XTAL. Its frequency
is limited to 4MHz due to an internal divide by 6 divider.
For customer who don't require higher uart speeds add "uart_at_4M"
to the kernel command line.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/imx6sl-clock.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/imx6sl-clock.h b/include/dt-bindings/clock/imx6sl-clock.h index c33e7f88911d..9b90165fbd5e 100644 --- a/include/dt-bindings/clock/imx6sl-clock.h +++ b/include/dt-bindings/clock/imx6sl-clock.h @@ -145,6 +145,7 @@ #define IMX6SL_CLK_USDHC4 132 #define IMX6SL_CLK_PLL4_AUDIO_DIV 133 #define IMX6SL_CLK_ENET 134 -#define IMX6SL_CLK_CLK_END 135 +#define IMX6SL_CLK_UART_OSC_4M 135 +#define IMX6SL_CLK_CLK_END 136 #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */ |