diff options
| author | Dominik Sliwa <dominik.sliwa@toradex.com> | 2018-03-21 17:29:05 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-03-28 18:34:12 +0200 |
| commit | d29859e6cf92a866470da451c4d815556ce99188 (patch) | |
| tree | 0382f216cf409ae9a9b5649a040d9c3bbbff5d49 /include | |
| parent | 722035cfcd7e238000eafa5803e26072433371c8 (diff) | |
apalis-tk1:lvds: add option to select 24-bit lvds mode
Add ability to switch between 24.1 and 24.0 lvds modes.
Mode description can be found in "Using 24-bpp LVDS Panels with
Intel® Mobile Chipsets for Embedded Applications".
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/display/tegra-dc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/display/tegra-dc.h b/include/dt-bindings/display/tegra-dc.h index 6f5c316dba15..d8fdcf913407 100644 --- a/include/dt-bindings/display/tegra-dc.h +++ b/include/dt-bindings/display/tegra-dc.h @@ -71,5 +71,9 @@ #define TEGRA_DC_OUT_PIN_POL_LOW 0 #define TEGRA_DC_OUT_PIN_POL_HIGH 1 +/* tegra 24-bit lvds mode */ +#define TEGRA_DC_LVDS_24_1 0 +#define TEGRA_DC_LVDS_24_0 1 + #endif /* __TEGRA_DC_H */ |