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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-01-03 17:47:12 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-01-03 17:47:12 +0100 |
| commit | eaad9460cac088d36f964f35e50922bc69b17a0c (patch) | |
| tree | de10c53bf6cef8c768ac5f766a2c79508f258c2e /include | |
| parent | 5bdde4505c493377165e6c2bdd5b51c86a53afa9 (diff) | |
colibri_t20: fix high speed UARTs
Avoid the following issue on both /dev/ttyHS1 as well as /dev/ttyHS3:
[ 4419.708332] tegra_uart tegra_uart.1: Setting clk_src pll_m
[ 4419.714361] Failed to set parent pll_m for uartb (violates clock
limit 600000000)
[ 4427.469124] tegra_uart tegra_uart.3: Setting clk_src pll_m
[ 4427.476177] Failed to set parent pll_m for uartd (violates clock
limit 600000000)
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions