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authorLinus Torvalds <torvalds@linux-foundation.org>2014-08-04 09:34:49 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-08-04 09:34:49 -0700
commitc2df436bd2504f52808c10ab7d7da832f61ad3f0 (patch)
treeb75aed765e66bad349f80d57b911b3f2822f6784 /include
parentf74ad8df4e74db550e5a2372cc1f025e56e1d523 (diff)
parenteba4bfb34d45a2219d1d7534905c026eea6fcd49 (diff)
Merge tag 'edac_for_3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC changes from Borislav Petkov: "EDAC queue for 3.17: - One new edac driver for Intel E3-12xx DRAM controllers. - Out-of-subsystem changes are making the non-atomic iomem 64-bit accessors' naming explicit to show both exact order of the 32-bit accesses and the non-atomicity of the 64-bit access. Usage locations are more verbose now as to what access is exactly being done vs having a not-very telling "readq" there, for example. This is needed by E3-12xx hardware where certain mmapped registers cannot be accessed with requests crossing a dword boundary. From Jason Baron. - Extending AMD MCE signatures to a new model 60h in family 15h, from Aravind Gopalakrishnan. - An unsigned check cleanup, from Fabian Frederick" * tag 'edac_for_3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC, MCE, AMD: Add MCE decoding for F15h M60h MAINTAINERS: add ie31200_edac entry ie31200_edac: Allocate mci and map mchbar first ie31200_edac: Introduce the driver x38_edac: make use of lo_hi_readq() readq/writeq: Add explicit lo_hi_[read|write]_q and hi_lo_[read|write]_q EDAC, edac_module.c: Remove unnecessary test on unsigned value
Diffstat (limited to 'include')
-rw-r--r--include/asm-generic/io-64-nonatomic-hi-lo.h14
-rw-r--r--include/asm-generic/io-64-nonatomic-lo-hi.h14
2 files changed, 18 insertions, 10 deletions
diff --git a/include/asm-generic/io-64-nonatomic-hi-lo.h b/include/asm-generic/io-64-nonatomic-hi-lo.h
index a6806a94250d..2e29d13fc154 100644
--- a/include/asm-generic/io-64-nonatomic-hi-lo.h
+++ b/include/asm-generic/io-64-nonatomic-hi-lo.h
@@ -4,8 +4,7 @@
#include <linux/io.h>
#include <asm-generic/int-ll64.h>
-#ifndef readq
-static inline __u64 readq(const volatile void __iomem *addr)
+static inline __u64 hi_lo_readq(const volatile void __iomem *addr)
{
const volatile u32 __iomem *p = addr;
u32 low, high;
@@ -15,14 +14,19 @@ static inline __u64 readq(const volatile void __iomem *addr)
return low + ((u64)high << 32);
}
-#endif
-#ifndef writeq
-static inline void writeq(__u64 val, volatile void __iomem *addr)
+static inline void hi_lo_writeq(__u64 val, volatile void __iomem *addr)
{
writel(val >> 32, addr + 4);
writel(val, addr);
}
+
+#ifndef readq
+#define readq hi_lo_readq
+#endif
+
+#ifndef writeq
+#define writeq hi_lo_writeq
#endif
#endif /* _ASM_IO_64_NONATOMIC_HI_LO_H_ */
diff --git a/include/asm-generic/io-64-nonatomic-lo-hi.h b/include/asm-generic/io-64-nonatomic-lo-hi.h
index ca546b1ff8b5..0efacff0a1ce 100644
--- a/include/asm-generic/io-64-nonatomic-lo-hi.h
+++ b/include/asm-generic/io-64-nonatomic-lo-hi.h
@@ -4,8 +4,7 @@
#include <linux/io.h>
#include <asm-generic/int-ll64.h>
-#ifndef readq
-static inline __u64 readq(const volatile void __iomem *addr)
+static inline __u64 lo_hi_readq(const volatile void __iomem *addr)
{
const volatile u32 __iomem *p = addr;
u32 low, high;
@@ -15,14 +14,19 @@ static inline __u64 readq(const volatile void __iomem *addr)
return low + ((u64)high << 32);
}
-#endif
-#ifndef writeq
-static inline void writeq(__u64 val, volatile void __iomem *addr)
+static inline void lo_hi_writeq(__u64 val, volatile void __iomem *addr)
{
writel(val, addr);
writel(val >> 32, addr + 4);
}
+
+#ifndef readq
+#define readq lo_hi_readq
+#endif
+
+#ifndef writeq
+#define writeq lo_hi_writeq
#endif
#endif /* _ASM_IO_64_NONATOMIC_LO_HI_H_ */