MLK-21963-1 reset: Add driver for dispmix reset

This is an reset driver to implement a reset controller
device DISPMIX on IMX8MM and IMX8MN platforms. Dispmix
reset is used to reset or enable related buses and clks
for the submodules in DISPMIX.

All the dispmix resets are divided into three subgroups:
sft_rstn, clk_en and mipi_rst, and each of them contains
several reset lines to control several different modules
on and off in DISPMIX which doesn't require the standard
reset flow, but only line assert and deassert operations.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

2 files changed, 96 insertions, 0 deletions

diff --git a/include/dt-bindings/reset/imx8mm-dispmix.h b/include/dt-bindings/reset/imx8mm-dispmix.h
new file mode 100644
index 000000000000..3af137b1bfe2
--- /dev/null
+++ b/include/dt-bindings/reset/imx8mm-dispmix.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright 2019 NXP
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __IMX8MM_DISPMIX_H__
+#define __IMX8MM_DISPMIX_H__
+
+/* DISPMIX soft reset */
+#define IMX8MM_CSI_BRIDGE_CHIP_RESET			0
+#define IMX8MM_CSI_BRIDGE_IPG_HARD_ASYNC_RESET		1
+#define IMX8MM_CSI_BRIDGE_CSI_HRESET			2
+#define IMX8MM_CAMERA_PIXEL_RESET			3
+#define IMX8MM_MIPI_CSI_I_PRESET			4
+#define IMX8MM_MIPI_DSI_I_PRESET			5
+#define IMX8MM_BUS_RSTN_BLK_SYNC			6
+#define IMX8MM_DISPMIX_SFT_RSTN_NUM			7
+
+/* DISPMIX clock soft enable */
+#define IMX8MM_CSI_BRIDGE_CSI_HCLK_EN			0
+#define IMX8MM_CSI_BRIDGE_SPU_CLK_EN			1
+#define IMX8MM_CSI_BRIDGE_MEM_WRAPPER_CLK_EN		2
+#define IMX8MM_CSI_BRIDGE_IPG_CLK_EN			3
+#define IMX8MM_CSI_BRIDGE_IPG_CLK_S_EN			4
+#define IMX8MM_CSI_BRIDGE_IPG_CLK_S_RAW_EN		5
+#define IMX8MM_LCDIF_APB_CLK_EN				6
+#define IMX8MM_LCDIF_PIXEL_CLK_EN			7
+#define IMX8MM_MIPI_DSI_PCLK_EN				8
+#define IMX8MM_MIPI_DSI_CLKREF_EN			9
+#define IMX8MM_MIPI_CSI_ACLK_EN				10
+#define IMX8MM_MIPI_CSI_PCLK_EN				11
+#define IMX8MM_BUS_BLK_CLK_EN				12
+#define IMX8MM_DISPMIX_CLK_EN_NUM			13
+
+/* MIPI reset */
+#define IMX8MM_MIPI_S_RESET				0
+#define IMX8MM_MIPI_M_RESET				1
+#define IMX8MM_MIPI_RESET_NUM				2
+
+#endif
diff --git a/include/dt-bindings/reset/imx8mn-dispmix.h b/include/dt-bindings/reset/imx8mn-dispmix.h
new file mode 100644
index 000000000000..8703ebe7d4b2
--- /dev/null
+++ b/include/dt-bindings/reset/imx8mn-dispmix.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2019 NXP
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __IMX8MN_DISPMIX_H__
+#define __IMX8MN_DISPMIX_H__
+
+/* DISPMIX soft reset */
+#define IMX8MN_MIPI_DSI_PCLK_RESET			0
+#define IMX8MN_MIPI_DSI_CLKREF_RESET			1
+#define IMX8MN_MIPI_CSI_PCLK_RESET			2
+#define IMX8MN_MIPI_CSI_ACLK_RESET			3
+#define IMX8MN_LCDIF_PIXEL_CLK_RESET			4
+#define IMX8MN_LCDIF_APB_CLK_RESET			5
+#define IMX8MN_ISI_PROC_CLK_RESET			6
+#define IMX8MN_ISI_APB_CLK_RESET			7
+#define IMX8MN_BUS_BLK_CLK_RESET			8
+#define IMX8MN_DISPMIX_SFT_RSTN_NUM			9
+
+/* DISPMIX clock soft enable */
+#define IMX8MN_MIPI_DSI_PCLK_EN				0
+#define IMX8MN_MIPI_DSI_CLKREF_EN			1
+#define IMX8MN_MIPI_CSI_PCLK_EN				2
+#define IMX8MN_MIPI_CSI_ACLK_EN				3
+#define IMX8MN_LCDIF_PIXEL_CLK_EN			4
+#define IMX8MN_LCDIF_APB_CLK_EN				5
+#define IMX8MN_ISI_PROC_CLK_EN				6
+#define IMX8MN_ISI_APB_CLK_EN				7
+#define IMX8MN_BUS_BLK_CLK_EN				8
+#define IMX8MN_DISPMIX_CLK_EN_NUM			9
+
+/* MIPI reset */
+#define IMX8MN_MIPI_S_RESET				0
+#define IMX8MN_MIPI_M_RESET				1
+#define IMX8MN_MIPI_RESET_NUM				2
+
+#endif