diff options
| author | Abel Vesa <abel.vesa@nxp.com> | 2019-05-13 19:22:24 +0300 |
|---|---|---|
| committer | Jian Li <jian.li@nxp.com> | 2019-06-20 11:39:53 +0800 |
| commit | 680f3fb0fb92008090e950e1db701a456e134cd1 (patch) | |
| tree | bd11f258c84864e3a3252dfb94ab71bbfe93ddd0 /include | |
| parent | ec7984b92d9ddf541e4e3abba62d6569a46c14a5 (diff) | |
MLK-21399 irqchip: gic-v3: Rework the ERR11171 workaround
Instead of just raising irq0 for all the cores, we mask the irq0 for all the
non-target cores, this way waking up only the core we want. All of this
is done now in TF-A.
Also, since this new workaround doesn't need the IOMUX_GPR1 register here
in kernel, the IOMUX_GPR reg entry inside the gic dts node can be removed.
In order for this to work, the following commit is needed in TF-A:
0e91ff59720d0756 ("MLK-21399 plat: imx8mq: gpc: Workaround for ERR11171")
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/soc/imx/fsl_sip.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/soc/imx/fsl_sip.h b/include/soc/imx/fsl_sip.h index 0fbcbb5d1e68..1fe8f286b13c 100644 --- a/include/soc/imx/fsl_sip.h +++ b/include/soc/imx/fsl_sip.h @@ -16,6 +16,7 @@ #define FSL_SIP_CONFIG_GPC_UNMASK 0x01 #define FSL_SIP_CONFIG_GPC_SET_WAKE 0x02 #define FSL_SIP_CONFIG_GPC_PM_DOMAIN 0x03 +#define FSL_SIP_CONFIG_GPC_CORE_WAKE 0x05 #define FSL_SIP_CPUFREQ 0xC2000001 #define FSL_SIP_SET_CPUFREQ 0x00 |