diff options
author | Vignesh Raghavendra <vigneshr@ti.com> | 2019-04-25 16:21:25 -0500 |
---|---|---|
committer | Han Xu <han.xu@nxp.com> | 2019-05-07 11:12:09 -0500 |
commit | 951011fda7698e2ee482bf5c71bf4a6818c86beb (patch) | |
tree | 3f7774d8c41a22080c144e4a96fcac514dd46b0f /include | |
parent | 0ed040a467ef98187f4893183c58d5cfd0f0e2bd (diff) |
mtd: cfi_cmdset_0002: Add support for polling status register
HyperFlash devices are compliant with CFI AMD/Fujitsu Extended Command
Set(0x0002) for flash operations, therefore drivers/mtd/chips/cfi_cmdset_0002.c
can be used as is. But these devices do not support DQ polling method of
determining chip ready/good status. These flashes provide Status
Register whose bits can be polled to know status of flash operation.
Cypress HyperFlash datasheet here[1], talks about CFI Amd/Fujitsu
Extended Query version 1.5. Bit 0 of "Software Features supported" field
of CFI Primary Vendor-Specific Extended Query table indicates
presence/absence of status register and Bit 1 indicates whether or not
DQ polling is supported. Using these bits, its possible to determine
whether flash supports DQ polling or need to use Status Register.
Add support for polling Status Register to know device ready/status of
erase/write operations when DQ polling is not supported.
Print error messages on erase/program failure by looking at related
Status Register bits.
[1] https://www.cypress.com/file/213346/download
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mtd/cfi.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index f56b52e60f43..626beeb63d37 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -233,6 +233,11 @@ struct cfi_pri_amdstd { uint8_t VppMin; uint8_t VppMax; uint8_t TopBottom; + /* Below field are added from version 1.5 */ + uint8_t ProgramSuspend; + uint8_t UnlockBypass; + uint8_t SecureSiliconSector; + uint8_t SoftwareFeatures; } __packed; /* Vendor-Specific PRI for Atmel chips (command set 0x0002) */ |