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authorLiu Ying <victor.liu@nxp.com>2018-06-12 15:32:18 +0800
committerLeonard Crestez <leonard.crestez@nxp.com>2018-08-24 12:41:33 +0300
commit51b83553df2edf0727498eb2d4d1904d2e02d1ad (patch)
tree94455ff25df6fa88b90b0ebf08e27081a6a1d3a2 /include
parent287a5923bcc83ed3cdf2592cfa1e8f0a80ef7a8d (diff)
MLK-18576-3 drm/imx: ldb: Add dual channel mode support for i.MX8dx/dxp/qxp
i.MX8dx/dxp/qxp use two LDBs(one primary, one auxiliary) to support dual channel mode. This patch adds the dual channel mode support for i.MX8dx/dxp/qxp. Note that the drivers contain specific sequence needed by this mode - LDB VSYNC polarity and channel selection settings should be configured into the register a bit earlier in ->atomic_mode_set instead of in ->enable, and DC subsystem pixel link enablement is moved from the DPU driver to the LDB driver to make sure it happens later than LDB clocks enablement in ->enable. Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'include')
-rw-r--r--include/video/dpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/video/dpu.h b/include/video/dpu.h
index 88c123af5f96..19d5bbaba6f2 100644
--- a/include/video/dpu.h
+++ b/include/video/dpu.h
@@ -593,7 +593,7 @@ void framegen_disable(struct dpu_framegen *fg);
void framegen_shdtokgen(struct dpu_framegen *fg);
void
framegen_cfg_videomode(struct dpu_framegen *fg, struct drm_display_mode *m,
- bool encoder_type_has_tmds);
+ bool encoder_type_has_tmds, bool encoder_type_has_lvds);
void framegen_pkickconfig(struct dpu_framegen *fg, bool enable);
void framegen_sacfg(struct dpu_framegen *fg, unsigned int x, unsigned int y);
void framegen_displaymode(struct dpu_framegen *fg, fgdm_t mode);