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author | Richard Zhu <hongxing.zhu@nxp.com> | 2020-05-27 10:11:08 +0800 |
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committer | Max Krummenacher <max.krummenacher@toradex.com> | 2020-11-26 13:51:58 +0000 |
commit | dcec956f9168c7f9a902cd44bd9a577f850de5cc (patch) | |
tree | 28174d39047454e49858128ccb126d3de6e18b4a /include | |
parent | e2e303b77b3f714687928e27f7a26a31f68a9b58 (diff) |
MLK-24171-1 arm64: dts: imx8mp: verify the pcie pll sys ref clock
Verify the PCIe PLL_SYS reference clock source on EVK board.
The external OSC clock is used as PCIe REF clock source in default.
NOTE: Change the ext_osc of pcie/pcie_phy to '0' when enable SYS_PLL
clock mode.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 1bda33273eccae3c0d878d34660eca9da1765db0)
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions