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authorHuang Shijie <b32955@freescale.com>2014-04-25 13:40:19 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-01-15 21:16:56 -0600
commit1003fff57a466365818d85acac46bf7544a9cbf6 (patch)
tree6717b0d464c9a46a63fcc7a27635dd08696d3f03 /include
parent8f4e9e58fb3e46fd75feee98d3a1e2575a468000 (diff)
ENGR00318895-10 mtd: spi-nor: add DDR quad read support for Micron
This patch adds the DDR(or DTR) quad read support for the Micron SPI NOR flash. Tested with n25q256a. Signed-off-by: Huang Shijie <b32955@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/spi-nor.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 241835911525..d924f6a07b4a 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -18,6 +18,7 @@
#define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */
#define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */
#define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */
+#define SPINOR_OP_READ_1_1_4_D 0x6d /* Read data bytes (DDR Quad SPI) */
#define SPINOR_OP_READ_1_4_4_D 0xed /* Read data bytes (DDR Quad SPI) */
#define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */
#define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */