diff options
| author | Stefan Agner <stefan@agner.ch> | 2014-09-19 23:04:28 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan@agner.ch> | 2016-02-10 18:42:32 -0800 |
| commit | ff0ed33be7bb14ede1fa2d0937534b8778b6f89e (patch) | |
| tree | e6ef3007c4410c72dde7234ff32d8a9accc2619e /include | |
| parent | 309805d16cbbbeab4061a13879beacda58d9f418 (diff) | |
ARM: imx: clk-gate2: allow custom gate configuration
The 2-bit gates found i.MX and Vybrid SoC support different clock
configuration:
0b00: clk disabled
0b01: clk enabled in RUN mode but disabled in WAIT and STOP mode
0b10: clk enabled in RUN, WAIT and STOP mode (only Vybrid)
0b11: clk enabled in RUN and WAIT mode
For some clocks, we might want to configure different behaviour,
e.g. a memory clock should be on even in STOP mode. Add a new
function imx_clk_gate2_cgr which allow to configure specific
gate values through the cgr_val parameter.
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/vf610-clock.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h index 56c16aaea112..cf2c00a06d10 100644 --- a/include/dt-bindings/clock/vf610-clock.h +++ b/include/dt-bindings/clock/vf610-clock.h @@ -195,6 +195,7 @@ #define VF610_CLK_SNVS 182 #define VF610_CLK_DAP 183 #define VF610_CLK_OCOTP 184 -#define VF610_CLK_END 185 +#define VF610_CLK_DDRMC 185 +#define VF610_CLK_END 186 #endif /* __DT_BINDINGS_CLOCK_VF610_H */ |