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authorSuresh Siddha <suresh.b.siddha@intel.com>2009-03-16 17:04:55 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2009-03-17 15:38:59 -0700
commit9d783ba042771284fb4ee5013c3d94220755ae7f (patch)
tree102ec9f89d363589108ae35e4b38c12fc6e2765c /include
parent0ac2491f57af5644f88383d28809760902d6f4d7 (diff)
x86, x2apic: enable fault handling for intr-remapping
Impact: interface augmentation (not yet used) Enable fault handling flow for intr-remapping aswell. Fault handling code now shared by both dma-remapping and intr-remapping. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/dmar.h5
-rw-r--r--include/linux/intel-iommu.h4
2 files changed, 4 insertions, 5 deletions
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index f28440784cf0..c7768330c11d 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -49,6 +49,7 @@ extern int dmar_dev_scope_init(void);
/* Intel IOMMU detection */
extern void detect_intel_iommu(void);
+extern int enable_drhd_fault_handling(void);
extern int parse_ioapics_under_ir(void);
@@ -116,9 +117,6 @@ extern struct intel_iommu *map_ioapic_to_ir(int apic);
#define intr_remapping_enabled (0)
#endif
-#ifdef CONFIG_DMAR
-extern const char *dmar_get_fault_reason(u8 fault_reason);
-
/* Can't use the common MSI interrupt functions
* since DMAR is not a pci device
*/
@@ -129,6 +127,7 @@ extern void dmar_msi_write(int irq, struct msi_msg *msg);
extern int dmar_set_interrupt(struct intel_iommu *iommu);
extern int arch_setup_dmar_msi(unsigned int irq);
+#ifdef CONFIG_DMAR
extern int iommu_detected, no_iommu;
extern struct list_head dmar_rmrr_units;
struct dmar_rmrr_unit {
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index d2e3cbfba14f..a9563840644b 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -292,6 +292,8 @@ struct intel_iommu {
spinlock_t register_lock; /* protect register handling */
int seq_id; /* sequence id of the iommu */
int agaw; /* agaw of this iommu */
+ unsigned int irq;
+ unsigned char name[13]; /* Device Name */
#ifdef CONFIG_DMAR
unsigned long *domain_ids; /* bitmap of domains */
@@ -299,8 +301,6 @@ struct intel_iommu {
spinlock_t lock; /* protect context, domain ids */
struct root_entry *root_entry; /* virtual address */
- unsigned int irq;
- unsigned char name[7]; /* Device Name */
struct iommu_flush flush;
#endif
struct q_inval *qi; /* Queued invalidation info */