diff options
author | Jeremy Fitzhardinge <jeremy@goop.org> | 2008-06-06 10:21:39 +0100 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-06-10 12:31:20 +0200 |
commit | ce8e37cdbdb34a9faeade22e0e6440f0d04560f5 (patch) | |
tree | de2fd45d521f45978808d8c7d949033cb6612556 /include | |
parent | 668231141f307ffd81db075b34bddaedae0ec863 (diff) |
x86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.
When a 64-bit x86 processor runs in 32-bit PAE mode, a pte can
potentially have the same number of physical address bits as the
64-bit host ("Enhanced Legacy PAE Paging"). This means, in theory,
we could have up to 52 bits of physical address in a pte.
The 32-bit kernel uses a 32-bit unsigned long to represent a pfn.
This means that it can only represent physical addresses up to 32+12=44
bits wide. Rather than widening pfns everywhere, just set 2^44 as the
Linux x86_32-PAE architectural limit for physical address size.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Cc: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-x86/page_32.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-x86/page_32.h b/include/asm-x86/page_32.h index 424e82f8ae27..ccf0ba3c3aba 100644 --- a/include/asm-x86/page_32.h +++ b/include/asm-x86/page_32.h @@ -14,7 +14,8 @@ #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) #ifdef CONFIG_X86_PAE -#define __PHYSICAL_MASK_SHIFT 36 +/* 44=32+12, the limit we can fit into an unsigned long pfn */ +#define __PHYSICAL_MASK_SHIFT 44 #define __VIRTUAL_MASK_SHIFT 32 #define PAGETABLE_LEVELS 3 |