diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2012-11-06 15:48:51 +0200 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 01:27:36 -0700 |
commit | fc50f7e531ad432cf6d326834857dd5e47e75970 (patch) | |
tree | 0bb516ab54891df55810793210e01306810efe86 /include | |
parent | 263fe124e7fcf34ba9ce6d69771a1bd4e22c58dd (diff) |
video: tegra: host: Fix CDMA timeout reset for 2D
When we have channel timeout, reset even modules for which we do not
have power gate id. As 2D needs channel teardown after reset, add
that to the reset sequence.
Add teardown fields to Tegra3 hardware headers. As we regenerate
hardware headers, Tegra11 boilerplate is changed a bit, too.
Change-Id: Ib3fd5744a9fa4faef0c6c8b83b6826732771a29f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/161642
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/nvhost.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/nvhost.h b/include/linux/nvhost.h index 6a35ed289226..4bddddc78699 100644 --- a/include/linux/nvhost.h +++ b/include/linux/nvhost.h @@ -72,6 +72,7 @@ struct nvhost_clock { unsigned long default_rate; u32 moduleid; unsigned long devfreq_rate; + int reset; }; enum nvhost_device_powerstate_t { |