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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2008-09-01 22:22:37 +0900
committerRalf Baechle <ralf@linux-mips.org>2008-10-11 16:18:47 +0100
commit21e77df215e58523a755b5dd006cb17610616f20 (patch)
tree94895b0fdc98e5f6ac44ba667feb96a9433a7065 /include
parentf6d9831bb11eb465f95fb1736b866d405d9c7cbf (diff)
MIPS: TXx9: Microoptimize interrupt handlers
The IOC interrupt status register on RBTX49XX only have 8 bits. Use 8-bit version of __fls() to optimize interrupt handlers. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-mips/txx9/generic.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h
index 1e1a9f2d2379..dc85515eac13 100644
--- a/include/asm-mips/txx9/generic.h
+++ b/include/asm-mips/txx9/generic.h
@@ -64,4 +64,22 @@ struct physmap_flash_data;
void txx9_physmap_flash_init(int no, unsigned long addr, unsigned long size,
const struct physmap_flash_data *pdata);
+/* 8 bit version of __fls(): find first bit set (returns 0..7) */
+static inline unsigned int __fls8(unsigned char x)
+{
+ int r = 7;
+
+ if (!(x & 0xf0)) {
+ r -= 4;
+ x <<= 4;
+ }
+ if (!(x & 0xc0)) {
+ r -= 2;
+ x <<= 2;
+ }
+ if (!(x & 0x80))
+ r -= 1;
+ return r;
+}
+
#endif /* __ASM_TXX9_GENERIC_H */