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authorLennert Buytenhek <buytenh@wantstofly.org>2006-09-18 23:26:25 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-25 10:25:53 +0100
commitc852ac80440db9b0a47f48578e9c6303078abbc1 (patch)
tree0c7fc1ca7700b0196a20242ca306003db7e35fb6 /include
parent475549faa161f4e002225f2ef75fdd2a6d83d151 (diff)
[ARM] 3832/1: iop3xx: coding style cleanup
Since the iop32x code isn't iop321-specific, and the iop33x code isn't iop331-specfic, do a s/iop321/iop32x/ and s/iop331/iop33x/, and tidy up the code to conform to the coding style guidelines somewhat better. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-iop32x/debug-macro.S14
-rw-r--r--include/asm-arm/arch-iop32x/dma.h4
-rw-r--r--include/asm-arm/arch-iop32x/entry-macro.S11
-rw-r--r--include/asm-arm/arch-iop32x/hardware.h24
-rw-r--r--include/asm-arm/arch-iop32x/io.h11
-rw-r--r--include/asm-arm/arch-iop32x/iop321.h86
-rw-r--r--include/asm-arm/arch-iop32x/iop32x.h28
-rw-r--r--include/asm-arm/arch-iop32x/iq31244.h8
-rw-r--r--include/asm-arm/arch-iop32x/iq80321.h8
-rw-r--r--include/asm-arm/arch-iop32x/irqs.h66
-rw-r--r--include/asm-arm/arch-iop32x/memory.h7
-rw-r--r--include/asm-arm/arch-iop32x/system.h17
-rw-r--r--include/asm-arm/arch-iop32x/timex.h5
-rw-r--r--include/asm-arm/arch-iop32x/uncompress.h7
-rw-r--r--include/asm-arm/arch-iop32x/vmalloc.h15
-rw-r--r--include/asm-arm/arch-iop33x/debug-macro.S12
-rw-r--r--include/asm-arm/arch-iop33x/dma.h4
-rw-r--r--include/asm-arm/arch-iop33x/entry-macro.S8
-rw-r--r--include/asm-arm/arch-iop33x/hardware.h19
-rw-r--r--include/asm-arm/arch-iop33x/io.h12
-rw-r--r--include/asm-arm/arch-iop33x/iop331.h110
-rw-r--r--include/asm-arm/arch-iop33x/iop33x.h33
-rw-r--r--include/asm-arm/arch-iop33x/iq80331.h8
-rw-r--r--include/asm-arm/arch-iop33x/iq80332.h8
-rw-r--r--include/asm-arm/arch-iop33x/irqs.h86
-rw-r--r--include/asm-arm/arch-iop33x/memory.h6
-rw-r--r--include/asm-arm/arch-iop33x/system.h17
-rw-r--r--include/asm-arm/arch-iop33x/timex.h3
-rw-r--r--include/asm-arm/arch-iop33x/uncompress.h9
-rw-r--r--include/asm-arm/arch-iop33x/vmalloc.h15
30 files changed, 249 insertions, 412 deletions
diff --git a/include/asm-arm/arch-iop32x/debug-macro.S b/include/asm-arm/arch-iop32x/debug-macro.S
index 75ab2e0d8c67..9022b6849e23 100644
--- a/include/asm-arm/arch-iop32x/debug-macro.S
+++ b/include/asm-arm/arch-iop32x/debug-macro.S
@@ -1,18 +1,18 @@
-/* linux/include/asm-arm/arch-iop32x/debug-macro.S
+/*
+ * include/asm-arm/arch-iop32x/debug-macro.S
*
* Debugging macro include header
*
- * Copyright (C) 1994-1999 Russell King
- * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
-*/
+ */
- .macro addruart,rx
- mov \rx, #0xfe000000 @ physical
+ .macro addruart, rx
+ mov \rx, #0xfe000000 @ physical as well as virtual
orr \rx, \rx, #0x00800000 @ location of the UART
.endm
diff --git a/include/asm-arm/arch-iop32x/dma.h b/include/asm-arm/arch-iop32x/dma.h
index 5be36676e58f..e977a9ef3160 100644
--- a/include/asm-arm/arch-iop32x/dma.h
+++ b/include/asm-arm/arch-iop32x/dma.h
@@ -1,7 +1,7 @@
/*
- * linux/include/asm-arm/arch-iop32x/dma.h
+ * include/asm-arm/arch-iop32x/dma.h
*
- * Copyright (C) 2004 Intel Corp.
+ * Copyright (C) 2004 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index 3497fef0b890..1500cbbd2295 100644
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -3,19 +3,16 @@
*
* Low-level IRQ helper macros for IOP32x-based platforms
*
- * This file is licensed under the terms of the GNU General Public
+ * This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
-#include <asm/arch/irqs.h>
+#include <asm/arch/iop32x.h>
- .macro disable_fiq
+ .macro disable_fiq
.endm
- /*
- * Note: only deal with normal interrupts, not FIQ
- */
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =IOP3XX_REG_ADDR(0x07D8)
ldr \irqstat, [\base] @ Read IINTSRC
cmp \irqstat, #0
diff --git a/include/asm-arm/arch-iop32x/hardware.h b/include/asm-arm/arch-iop32x/hardware.h
index 16d0630ab252..6a3001f2f7e0 100644
--- a/include/asm-arm/arch-iop32x/hardware.h
+++ b/include/asm-arm/arch-iop32x/hardware.h
@@ -1,8 +1,9 @@
/*
- * linux/include/asm-arm/arch-iop32x/hardware.h
+ * include/asm-arm/arch-iop32x/hardware.h
*/
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
+
+#ifndef __HARDWARE_H
+#define __HARDWARE_H
#include <asm/types.h>
@@ -13,21 +14,23 @@
* the IO resources.
*
* The PCI IO space is located at virtual 0xfe000000 from physical
- * 0x90000000. The PCI BARs must be programmed with physical addresses,
- * but when we read them, we convert them to virtual addresses. See
- * arch/arm/mach-iop3xx/iop3xx-pci.c
+ * 0x90000000. The PCI BARs must be programmed with physical addresses,
+ * but when we read them, we convert them to virtual addresses. See
+ * arch/arm/plat-iop/pci.c.
*/
-
#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
+#ifndef __ASSEMBLY__
+void iop32x_init_irq(void);
+#endif
+
/*
* Generic chipset bits
- *
*/
-#include "iop321.h"
+#include "iop32x.h"
/*
* Board specific bits
@@ -35,4 +38,5 @@
#include "iq80321.h"
#include "iq31244.h"
-#endif /* _ASM_ARCH_HARDWARE_H */
+
+#endif
diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h
index 36d05ada12c4..12d9ee02cde3 100644
--- a/include/asm-arm/arch-iop32x/io.h
+++ b/include/asm-arm/arch-iop32x/io.h
@@ -1,21 +1,22 @@
/*
- * linux/include/asm-arm/arch-iop32x/io.h
+ * include/asm-arm/arch-iop32x/io.h
*
- * Copyright (C) 2001 MontaVista Software, Inc.
+ * Copyright (C) 2001 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
+#ifndef __IO_H
+#define __IO_H
#include <asm/hardware.h>
-#define IO_SPACE_LIMIT 0xffffffff
+#define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)(p))
#define __mem_pci(a) (a)
+
#endif
diff --git a/include/asm-arm/arch-iop32x/iop321.h b/include/asm-arm/arch-iop32x/iop321.h
deleted file mode 100644
index 1757222a4cad..000000000000
--- a/include/asm-arm/arch-iop32x/iop321.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * linux/include/asm/arch-iop32x/iop321.h
- *
- * Intel IOP321 Chip definitions
- *
- * Author: Rory Bolt <rorybolt@pacbell.net>
- * Copyright (C) 2002 Rory Bolt
- * Copyright (C) 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _IOP321_HW_H_
-#define _IOP321_HW_H_
-
-
-/*
- * This is needed for mixed drivers that need to work on all
- * IOP3xx variants but behave slightly differently on each.
- */
-#ifndef __ASSEMBLY__
-#define iop_is_321() 1
-#endif
-
-/*
- * IOP321 chipset registers
- */
-#define IOP321_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/
-#define IOP321_PHYS_MEM_BASE 0xffffe000 /* chip physical memory address */
-#define IOP321_REG_ADDR(reg) (IOP321_VIRT_MEM_BASE | (reg))
-
-/* Reserved 0x00000000 through 0x000000FF */
-
-/* Address Translation Unit 0x00000100 through 0x000001FF */
-
-/* Messaging Unit 0x00000300 through 0x000003FF */
-
-/* DMA Controller 0x00000400 through 0x000004FF */
-
-/* Memory controller 0x00000500 through 0x0005FF */
-
-/* Peripheral bus interface unit 0x00000680 through 0x0006FF */
-
-/* Peripheral performance monitoring unit 0x00000700 through 0x00077F */
-
-/* Internal arbitration unit 0x00000780 through 0x0007BF */
-#define IOP321_IACR (volatile u32 *)IOP321_REG_ADDR(0x00000780)
-#define IOP321_MTTR1 (volatile u32 *)IOP321_REG_ADDR(0x00000784)
-#define IOP321_MTTR2 (volatile u32 *)IOP321_REG_ADDR(0x00000788)
-
-/* General Purpose I/O Registers */
-#define IOP321_GPOE (volatile u32 *)IOP321_REG_ADDR(0x000007C4)
-#define IOP321_GPID (volatile u32 *)IOP321_REG_ADDR(0x000007C8)
-#define IOP321_GPOD (volatile u32 *)IOP321_REG_ADDR(0x000007CC)
-
-/* Interrupt Controller */
-#define IOP321_INTCTL (volatile u32 *)IOP321_REG_ADDR(0x000007D0)
-#define IOP321_INTSTR (volatile u32 *)IOP321_REG_ADDR(0x000007D4)
-#define IOP321_IINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007D8)
-#define IOP321_FINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007DC)
-
-/* Application accelerator unit 0x00000800 - 0x000008FF */
-
-/* SSP serial port unit 0x00001600 - 0x0000167F */
-/* I2C bus interface unit 0x00001680 - 0x000016FF */
-
-/* for I2C bit defs see drivers/i2c/i2c-iop3xx.h */
-
-/*
- * Peripherals that are shared between the iop32x and iop33x but
- * located at different addresses.
- */
-#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg))
-#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
-
-#include <asm/hardware/iop3xx.h>
-
-
-#ifndef __ASSEMBLY__
-extern void iop321_init_irq(void);
-extern void iop321_time_init(void);
-#endif
-
-#endif // _IOP321_HW_H_
diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h
new file mode 100644
index 000000000000..4bbd85f3ed2a
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/iop32x.h
@@ -0,0 +1,28 @@
+/*
+ * include/asm-arm/arch-iop32x/iop32x.h
+ *
+ * Intel IOP32X Chip definitions
+ *
+ * Author: Rory Bolt <rorybolt@pacbell.net>
+ * Copyright (C) 2002 Rory Bolt
+ * Copyright (C) 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __IOP32X_H
+#define __IOP32X_H
+
+/*
+ * Peripherals that are shared between the iop32x and iop33x but
+ * located at different addresses.
+ */
+#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg))
+#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
+
+#include <asm/hardware/iop3xx.h>
+
+
+#endif
diff --git a/include/asm-arm/arch-iop32x/iq31244.h b/include/asm-arm/arch-iop32x/iq31244.h
index cf2d2343398d..fff4eafa1f6b 100644
--- a/include/asm-arm/arch-iop32x/iq31244.h
+++ b/include/asm-arm/arch-iop32x/iq31244.h
@@ -1,11 +1,11 @@
/*
- * linux/include/asm/arch-iop32x/iq31244.h
+ * include/asm-arm/arch-iop32x/iq31244.h
*
* Intel IQ31244 evaluation board registers
*/
-#ifndef _IQ31244_H_
-#define _IQ31244_H_
+#ifndef __IQ31244_H
+#define __IQ31244_H
#define IQ31244_UART 0xfe800000 /* UART #1 */
#define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */
@@ -14,4 +14,4 @@
#define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */
-#endif // _IQ31244_H_
+#endif
diff --git a/include/asm-arm/arch-iop32x/iq80321.h b/include/asm-arm/arch-iop32x/iq80321.h
index 55d70f49b7fd..eb69db9b9a06 100644
--- a/include/asm-arm/arch-iop32x/iq80321.h
+++ b/include/asm-arm/arch-iop32x/iq80321.h
@@ -1,11 +1,11 @@
/*
- * linux/include/asm/arch-iop32x/iq80321.h
+ * include/asm-arm/arch-iop32x/iq80321.h
*
* Intel IQ80321 evaluation board registers
*/
-#ifndef _IQ80321_H_
-#define _IQ80321_H_
+#ifndef __IQ80321_H
+#define __IQ80321_H
#define IQ80321_UART 0xfe800000 /* UART #1 */
#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */
@@ -14,4 +14,4 @@
#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */
-#endif // _IQ80321_H_
+#endif
diff --git a/include/asm-arm/arch-iop32x/irqs.h b/include/asm-arm/arch-iop32x/irqs.h
index a48327ced92e..bbaef873afce 100644
--- a/include/asm-arm/arch-iop32x/irqs.h
+++ b/include/asm-arm/arch-iop32x/irqs.h
@@ -1,5 +1,5 @@
/*
- * linux/include/asm-arm/arch-iop32x/irqs.h
+ * include/asm-arm/arch-iop32x/irqs.h
*
* Author: Rory Bolt <rorybolt@pacbell.net>
* Copyright: (C) 2002 Rory Bolt
@@ -7,44 +7,44 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
*/
-#ifndef _IRQS_H_
-#define _IRQS_H_
+
+#ifndef __IRQS_H
+#define __IRQS_H
/*
* IOP80321 chipset interrupts
*/
-#define IRQ_IOP321_DMA0_EOT 0
-#define IRQ_IOP321_DMA0_EOC 1
-#define IRQ_IOP321_DMA1_EOT 2
-#define IRQ_IOP321_DMA1_EOC 3
-#define IRQ_IOP321_AA_EOT 6
-#define IRQ_IOP321_AA_EOC 7
-#define IRQ_IOP321_CORE_PMON 8
-#define IRQ_IOP321_TIMER0 9
-#define IRQ_IOP321_TIMER1 10
-#define IRQ_IOP321_I2C_0 11
-#define IRQ_IOP321_I2C_1 12
-#define IRQ_IOP321_MESSAGING 13
-#define IRQ_IOP321_ATU_BIST 14
-#define IRQ_IOP321_PERFMON 15
-#define IRQ_IOP321_CORE_PMU 16
-#define IRQ_IOP321_BIU_ERR 17
-#define IRQ_IOP321_ATU_ERR 18
-#define IRQ_IOP321_MCU_ERR 19
-#define IRQ_IOP321_DMA0_ERR 20
-#define IRQ_IOP321_DMA1_ERR 21
-#define IRQ_IOP321_AA_ERR 23
-#define IRQ_IOP321_MSG_ERR 24
-#define IRQ_IOP321_SSP 25
-#define IRQ_IOP321_XINT0 27
-#define IRQ_IOP321_XINT1 28
-#define IRQ_IOP321_XINT2 29
-#define IRQ_IOP321_XINT3 30
-#define IRQ_IOP321_HPI 31
+#define IRQ_IOP32X_DMA0_EOT 0
+#define IRQ_IOP32X_DMA0_EOC 1
+#define IRQ_IOP32X_DMA1_EOT 2
+#define IRQ_IOP32X_DMA1_EOC 3
+#define IRQ_IOP32X_AA_EOT 6
+#define IRQ_IOP32X_AA_EOC 7
+#define IRQ_IOP32X_CORE_PMON 8
+#define IRQ_IOP32X_TIMER0 9
+#define IRQ_IOP32X_TIMER1 10
+#define IRQ_IOP32X_I2C_0 11
+#define IRQ_IOP32X_I2C_1 12
+#define IRQ_IOP32X_MESSAGING 13
+#define IRQ_IOP32X_ATU_BIST 14
+#define IRQ_IOP32X_PERFMON 15
+#define IRQ_IOP32X_CORE_PMU 16
+#define IRQ_IOP32X_BIU_ERR 17
+#define IRQ_IOP32X_ATU_ERR 18
+#define IRQ_IOP32X_MCU_ERR 19
+#define IRQ_IOP32X_DMA0_ERR 20
+#define IRQ_IOP32X_DMA1_ERR 21
+#define IRQ_IOP32X_AA_ERR 23
+#define IRQ_IOP32X_MSG_ERR 24
+#define IRQ_IOP32X_SSP 25
+#define IRQ_IOP32X_XINT0 27
+#define IRQ_IOP32X_XINT1 28
+#define IRQ_IOP32X_XINT2 29
+#define IRQ_IOP32X_XINT3 30
+#define IRQ_IOP32X_HPI 31
#define NR_IRQS 32
-#endif // _IRQ_H_
+#endif
diff --git a/include/asm-arm/arch-iop32x/memory.h b/include/asm-arm/arch-iop32x/memory.h
index 4c64d9e7229b..764cd3f0d416 100644
--- a/include/asm-arm/arch-iop32x/memory.h
+++ b/include/asm-arm/arch-iop32x/memory.h
@@ -1,9 +1,9 @@
/*
- * linux/include/asm-arm/arch-iop32x/memory.h
+ * include/asm-arm/arch-iop32x/memory.h
*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
+#ifndef __MEMORY_H
+#define __MEMORY_H
#include <asm/hardware.h>
@@ -19,7 +19,6 @@
* bus_to_virt: Used to convert an address for DMA operations
* to an address that the kernel can use.
*/
-
#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0))
#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2)))
diff --git a/include/asm-arm/arch-iop32x/system.h b/include/asm-arm/arch-iop32x/system.h
index 1ac207a0d52e..c65ede3e627a 100644
--- a/include/asm-arm/arch-iop32x/system.h
+++ b/include/asm-arm/arch-iop32x/system.h
@@ -1,7 +1,7 @@
/*
- * linux/include/asm-arm/arch-iop32x/system.h
+ * include/asm-arm/arch-iop32x/system.h
*
- * Copyright (C) 2001 MontaVista Software, Inc.
+ * Copyright (C) 2001 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -13,17 +13,10 @@ static inline void arch_idle(void)
cpu_do_idle();
}
-
static inline void arch_reset(char mode)
{
- *IOP3XX_PCSR = 0x30;
+ *IOP3XX_PCSR = 0x30;
- if ( 1 && mode == 's') {
- /* Jump into ROM at address 0 */
- cpu_reset(0);
- } else {
- /* No on-chip reset capability */
- cpu_reset(0);
- }
+ /* Jump into ROM at address 0 */
+ cpu_reset(0);
}
-
diff --git a/include/asm-arm/arch-iop32x/timex.h b/include/asm-arm/arch-iop32x/timex.h
index 328f37282c3e..9934b087311b 100644
--- a/include/asm-arm/arch-iop32x/timex.h
+++ b/include/asm-arm/arch-iop32x/timex.h
@@ -1,8 +1,9 @@
/*
- * linux/include/asm-arm/arch-iop32x/timex.h
+ * include/asm-arm/arch-iop32x/timex.h
*
- * IOP3xx architecture timex specifications
+ * IOP32x architecture timex specifications
*/
+
#include <asm/hardware.h>
#define CLOCK_TICK_RATE (100 * HZ)
diff --git a/include/asm-arm/arch-iop32x/uncompress.h b/include/asm-arm/arch-iop32x/uncompress.h
index 4a85f20c796f..e64f52bf2bce 100644
--- a/include/asm-arm/arch-iop32x/uncompress.h
+++ b/include/asm-arm/arch-iop32x/uncompress.h
@@ -1,6 +1,7 @@
/*
- * linux/include/asm-arm/arch-iop32x/uncompress.h
+ * include/asm-arm/arch-iop32x/uncompress.h
*/
+
#include <asm/types.h>
#include <asm/mach-types.h>
#include <linux/serial_reg.h>
@@ -8,13 +9,13 @@
static volatile u8 *uart_base;
-#define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE)
+#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE)
static inline void putc(char c)
{
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
barrier();
- *uart_base = c;
+ uart_base[UART_TX] = c;
}
static inline void flush(void)
diff --git a/include/asm-arm/arch-iop32x/vmalloc.h b/include/asm-arm/arch-iop32x/vmalloc.h
index 8492e1708a63..0a70baa19517 100644
--- a/include/asm-arm/arch-iop32x/vmalloc.h
+++ b/include/asm-arm/arch-iop32x/vmalloc.h
@@ -1,16 +1,5 @@
/*
- * linux/include/asm-arm/arch-iop32x/vmalloc.h
+ * include/asm-arm/arch-iop32x/vmalloc.h
*/
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-//#define VMALLOC_END (0xe8000000)
-/* increase usable physical RAM to ~992M per RMK */
-#define VMALLOC_END (0xfe000000)
-
+#define VMALLOC_END 0xfe000000
diff --git a/include/asm-arm/arch-iop33x/debug-macro.S b/include/asm-arm/arch-iop33x/debug-macro.S
index b647edff475d..9e7132ebe6a7 100644
--- a/include/asm-arm/arch-iop33x/debug-macro.S
+++ b/include/asm-arm/arch-iop33x/debug-macro.S
@@ -1,17 +1,17 @@
-/* linux/include/asm-arm/arch-iop33x/debug-macro.S
+/*
+ * include/asm-arm/arch-iop33x/debug-macro.S
*
* Debugging macro include header
*
- * Copyright (C) 1994-1999 Russell King
- * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
+ * Copyright (C) 1994-1999 Russell King
+ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
-*/
+ */
- .macro addruart,rx
+ .macro addruart, rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ mmu enabled?
moveq \rx, #0xff000000 @ physical
diff --git a/include/asm-arm/arch-iop33x/dma.h b/include/asm-arm/arch-iop33x/dma.h
index d577ca59f4b0..b7775fdc5ad3 100644
--- a/include/asm-arm/arch-iop33x/dma.h
+++ b/include/asm-arm/arch-iop33x/dma.h
@@ -1,7 +1,7 @@
/*
- * linux/include/asm-arm/arch-iop33x/dma.h
+ * include/asm-arm/arch-iop33x/dma.h
*
- * Copyright (C) 2004 Intel Corp.
+ * Copyright (C) 2004 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S
index 4750e98e9b4a..92b791702e34 100644
--- a/include/asm-arm/arch-iop33x/entry-macro.S
+++ b/include/asm-arm/arch-iop33x/entry-macro.S
@@ -3,16 +3,16 @@
*
* Low-level IRQ helper macros for IOP33x-based platforms
*
- * This file is licensed under the terms of the GNU General Public
+ * This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
-#include <asm/arch/irqs.h>
+#include <asm/arch/iop33x.h>
- .macro disable_fiq
+ .macro disable_fiq
.endm
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =IOP3XX_REG_ADDR(0x07C8)
ldr \irqstat, [\base] @ Read IINTVEC
cmp \irqstat, #0
diff --git a/include/asm-arm/arch-iop33x/hardware.h b/include/asm-arm/arch-iop33x/hardware.h
index 3ebfdc6fea99..0659cf94d040 100644
--- a/include/asm-arm/arch-iop33x/hardware.h
+++ b/include/asm-arm/arch-iop33x/hardware.h
@@ -1,8 +1,9 @@
/*
- * linux/include/asm-arm/arch-iop33x/hardware.h
+ * include/asm-arm/arch-iop33x/hardware.h
*/
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
+
+#ifndef __HARDWARE_H
+#define __HARDWARE_H
#include <asm/types.h>
@@ -15,14 +16,15 @@
* The PCI IO space is located at virtual 0xfe000000 from physical
* 0x90000000. The PCI BARs must be programmed with physical addresses,
* but when we read them, we convert them to virtual addresses. See
- * arch/arm/mach-iop33x/pci.c
+ * arch/arm/mach-iop3xx/iop3xx-pci.c
*/
-
-#define pcibios_assign_all_busses() 1
+#define pcibios_assign_all_busses() 1
#define PCIBIOS_MIN_IO 0x00000000
#define PCIBIOS_MIN_MEM 0x00000000
#ifndef __ASSEMBLY__
+void iop33x_init_irq(void);
+
extern struct platform_device iop33x_uart0_device;
extern struct platform_device iop33x_uart1_device;
#endif
@@ -32,7 +34,7 @@ extern struct platform_device iop33x_uart1_device;
* Generic chipset bits
*
*/
-#include "iop331.h"
+#include "iop33x.h"
/*
* Board specific bits
@@ -40,4 +42,5 @@ extern struct platform_device iop33x_uart1_device;
#include "iq80331.h"
#include "iq80332.h"
-#endif /* _ASM_ARCH_HARDWARE_H */
+
+#endif
diff --git a/include/asm-arm/arch-iop33x/io.h b/include/asm-arm/arch-iop33x/io.h
index a9949d5d4953..c017402bab96 100644
--- a/include/asm-arm/arch-iop33x/io.h
+++ b/include/asm-arm/arch-iop33x/io.h
@@ -1,21 +1,21 @@
/*
- * linux/include/asm-arm/arch-iop33x/io.h
+ * include/asm-arm/arch-iop33x/io.h
*
- * Copyright (C) 2001 MontaVista Software, Inc.
+ * Copyright (C) 2001 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
+#ifndef __IO_H
+#define __IO_H
#include <asm/hardware.h>
-#define IO_SPACE_LIMIT 0xffffffff
-
+#define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)(p))
#define __mem_pci(a) (a)
+
#endif
diff --git a/include/asm-arm/arch-iop33x/iop331.h b/include/asm-arm/arch-iop33x/iop331.h
deleted file mode 100644
index 8c7ec583615f..000000000000
--- a/include/asm-arm/arch-iop33x/iop331.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * linux/include/asm/arch-iop33x/iop331.h
- *
- * Intel IOP331 Chip definitions
- *
- * Author: Dave Jiang (dave.jiang@intel.com)
- * Copyright (C) 2003, 2004 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _IOP331_HW_H_
-#define _IOP331_HW_H_
-
-
-/*
- * This is needed for mixed drivers that need to work on all
- * IOP3xx variants but behave slightly differently on each.
- */
-#ifndef __ASSEMBLY__
-#define iop_is_331() 1
-#endif
-
-/*
- * IOP331 chipset registers
- */
-#define IOP331_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/
-#define IOP331_PHYS_MEM_BASE 0xffffe000 /* chip physical memory address */
-#define IOP331_REG_ADDR(reg) (IOP331_VIRT_MEM_BASE | (reg))
-
-/* Reserved 0x00000000 through 0x000000FF */
-
-/* Address Translation Unit 0x00000100 through 0x000001FF */
-
-/* Messaging Unit 0x00000300 through 0x000003FF */
-
-/* DMA Controller 0x00000400 through 0x000004FF */
-
-/* Memory controller 0x00000500 through 0x0005FF */
-
-/* Peripheral bus interface unit 0x00000680 through 0x0006FF */
-
-/* Peripheral performance monitoring unit 0x00000700 through 0x00077F */
-/* Internal arbitration unit 0x00000780 through 0x0007BF */
-
-/* Interrupt Controller */
-#define IOP331_INTCTL0 (volatile u32 *)IOP331_REG_ADDR(0x00000790)
-#define IOP331_INTCTL1 (volatile u32 *)IOP331_REG_ADDR(0x00000794)
-#define IOP331_INTSTR0 (volatile u32 *)IOP331_REG_ADDR(0x00000798)
-#define IOP331_INTSTR1 (volatile u32 *)IOP331_REG_ADDR(0x0000079C)
-#define IOP331_IINTSRC0 (volatile u32 *)IOP331_REG_ADDR(0x000007A0)
-#define IOP331_IINTSRC1 (volatile u32 *)IOP331_REG_ADDR(0x000007A4)
-#define IOP331_FINTSRC0 (volatile u32 *)IOP331_REG_ADDR(0x000007A8)
-#define IOP331_FINTSRC1 (volatile u32 *)IOP331_REG_ADDR(0x000007AC)
-#define IOP331_IPR0 (volatile u32 *)IOP331_REG_ADDR(0x000007B0)
-#define IOP331_IPR1 (volatile u32 *)IOP331_REG_ADDR(0x000007B4)
-#define IOP331_IPR2 (volatile u32 *)IOP331_REG_ADDR(0x000007B8)
-#define IOP331_IPR3 (volatile u32 *)IOP331_REG_ADDR(0x000007BC)
-#define IOP331_INTBASE (volatile u32 *)IOP331_REG_ADDR(0x000007C0)
-#define IOP331_INTSIZE (volatile u32 *)IOP331_REG_ADDR(0x000007C4)
-#define IOP331_IINTVEC (volatile u32 *)IOP331_REG_ADDR(0x000007C8)
-#define IOP331_FINTVEC (volatile u32 *)IOP331_REG_ADDR(0x000007CC)
-
-
-/* Application accelerator unit 0x00000800 - 0x000008FF */
-
-#define IOP331_SPDSCR (volatile u32 *)IOP331_REG_ADDR(0x000015C0)
-#define IOP331_PPDSCR (volatile u32 *)IOP331_REG_ADDR(0x000015C8)
-/* SSP serial port unit 0x00001600 - 0x0000167F */
-
-/* I2C bus interface unit 0x00001680 - 0x000016FF */
-
-/* 0x00001700 through 0x0000172C UART 0 */
-
-/* Reserved 0x00001730 through 0x0000173F */
-
-/* 0x00001740 through 0x0000176C UART 1 */
-
-#define IOP331_UART0_PHYS (IOP331_PHYS_MEM_BASE | 0x00001700) /* UART #1 physical */
-#define IOP331_UART1_PHYS (IOP331_PHYS_MEM_BASE | 0x00001740) /* UART #2 physical */
-#define IOP331_UART0_VIRT (IOP331_VIRT_MEM_BASE | 0x00001700) /* UART #1 virtual addr */
-#define IOP331_UART1_VIRT (IOP331_VIRT_MEM_BASE | 0x00001740) /* UART #2 virtual addr */
-
-/* Reserved 0x00001770 through 0x0000177F */
-
-/* General Purpose I/O Registers */
-#define IOP331_GPOE (volatile u32 *)IOP331_REG_ADDR(0x00001780)
-#define IOP331_GPID (volatile u32 *)IOP331_REG_ADDR(0x00001784)
-#define IOP331_GPOD (volatile u32 *)IOP331_REG_ADDR(0x00001788)
-
-/* Reserved 0x0000178c through 0x000019ff */
-
-/*
- * Peripherals that are shared between the iop32x and iop33x but
- * located at different addresses.
- */
-#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))
-#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
-
-#include <asm/hardware/iop3xx.h>
-
-
-#ifndef __ASSEMBLY__
-extern void iop331_init_irq(void);
-extern void iop331_time_init(void);
-#endif
-
-#endif // _IOP331_HW_H_
diff --git a/include/asm-arm/arch-iop33x/iop33x.h b/include/asm-arm/arch-iop33x/iop33x.h
new file mode 100644
index 000000000000..7ac6e93db5ff
--- /dev/null
+++ b/include/asm-arm/arch-iop33x/iop33x.h
@@ -0,0 +1,33 @@
+/*
+ * include/asm-arm/arch-iop33x/iop33x.h
+ *
+ * Intel IOP33X Chip definitions
+ *
+ * Author: Dave Jiang (dave.jiang@intel.com)
+ * Copyright (C) 2003, 2004 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __IOP33X_H
+#define __IOP33X_H
+
+/*
+ * Peripherals that are shared between the iop32x and iop33x but
+ * located at different addresses.
+ */
+#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))
+#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
+
+#include <asm/hardware/iop3xx.h>
+
+/* UARTs */
+#define IOP33X_UART0_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1700)
+#define IOP33X_UART0_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1700)
+#define IOP33X_UART1_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740)
+#define IOP33X_UART1_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740)
+
+
+#endif
diff --git a/include/asm-arm/arch-iop33x/iq80331.h b/include/asm-arm/arch-iop33x/iq80331.h
index 186762bf8944..79b9302017ea 100644
--- a/include/asm-arm/arch-iop33x/iq80331.h
+++ b/include/asm-arm/arch-iop33x/iq80331.h
@@ -1,11 +1,11 @@
/*
- * linux/include/asm/arch-iop33x/iq80331.h
+ * include/asm-arm/arch-iop33x/iq80331.h
*
* Intel IQ80331 evaluation board registers
*/
-#ifndef _IQ80331_H_
-#define _IQ80331_H_
+#ifndef __IQ80331_H
+#define __IQ80331_H
#define IQ80331_7SEG_1 0xce840000 /* 7-Segment MSB */
#define IQ80331_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */
@@ -13,4 +13,4 @@
#define IQ80331_BATT_STAT 0xce8f0000 /* Battery Status */
-#endif // _IQ80331_H_
+#endif
diff --git a/include/asm-arm/arch-iop33x/iq80332.h b/include/asm-arm/arch-iop33x/iq80332.h
index 2a5d4ee01df9..053165629492 100644
--- a/include/asm-arm/arch-iop33x/iq80332.h
+++ b/include/asm-arm/arch-iop33x/iq80332.h
@@ -1,11 +1,11 @@
/*
- * linux/include/asm/arch-iop33x/iq80332.h
+ * include/asm-arm/arch-iop33x/iq80332.h
*
* Intel IQ80332 evaluation board registers
*/
-#ifndef _IQ80332_H_
-#define _IQ80332_H_
+#ifndef __IQ80332_H
+#define __IQ80332_H
#define IQ80332_7SEG_1 0xce840000 /* 7-Segment MSB */
#define IQ80332_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */
@@ -13,4 +13,4 @@
#define IQ80332_BATT_STAT 0xce8f0000 /* Battery Status */
-#endif // _IQ80332_H_
+#endif
diff --git a/include/asm-arm/arch-iop33x/irqs.h b/include/asm-arm/arch-iop33x/irqs.h
index a875404a07fc..d045f8403396 100644
--- a/include/asm-arm/arch-iop33x/irqs.h
+++ b/include/asm-arm/arch-iop33x/irqs.h
@@ -1,5 +1,5 @@
/*
- * linux/include/asm-arm/arch-iop33x/irqs.h
+ * include/asm-arm/arch-iop33x/irqs.h
*
* Author: Dave Jiang (dave.jiang@intel.com)
* Copyright: (C) 2003 Intel Corp.
@@ -7,54 +7,54 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
*/
-#ifndef _IRQS_H_
-#define _IRQS_H_
+
+#ifndef __IRQS_H
+#define __IRQS_H
/*
* IOP80331 chipset interrupts
*/
-#define IRQ_IOP331_DMA0_EOT 0
-#define IRQ_IOP331_DMA0_EOC 1
-#define IRQ_IOP331_DMA1_EOT 2
-#define IRQ_IOP331_DMA1_EOC 3
-#define IRQ_IOP331_AA_EOT 6
-#define IRQ_IOP331_AA_EOC 7
-#define IRQ_IOP331_TIMER0 8
-#define IRQ_IOP331_TIMER1 9
-#define IRQ_IOP331_I2C_0 10
-#define IRQ_IOP331_I2C_1 11
-#define IRQ_IOP331_MSG 12
-#define IRQ_IOP331_MSGIBQ 13
-#define IRQ_IOP331_ATU_BIST 14
-#define IRQ_IOP331_PERFMON 15
-#define IRQ_IOP331_CORE_PMU 16
-#define IRQ_IOP331_XINT0 24
-#define IRQ_IOP331_XINT1 25
-#define IRQ_IOP331_XINT2 26
-#define IRQ_IOP331_XINT3 27
-#define IRQ_IOP331_XINT8 32
-#define IRQ_IOP331_XINT9 33
-#define IRQ_IOP331_XINT10 34
-#define IRQ_IOP331_XINT11 35
-#define IRQ_IOP331_XINT12 36
-#define IRQ_IOP331_XINT13 37
-#define IRQ_IOP331_XINT14 38
-#define IRQ_IOP331_XINT15 39
-#define IRQ_IOP331_UART0 51
-#define IRQ_IOP331_UART1 52
-#define IRQ_IOP331_PBIE 53
-#define IRQ_IOP331_ATU_CRW 54
-#define IRQ_IOP331_ATU_ERR 55
-#define IRQ_IOP331_MCU_ERR 56
-#define IRQ_IOP331_DMA0_ERR 57
-#define IRQ_IOP331_DMA1_ERR 58
-#define IRQ_IOP331_AA_ERR 60
-#define IRQ_IOP331_MSG_ERR 62
-#define IRQ_IOP331_HPI 63
+#define IRQ_IOP33X_DMA0_EOT 0
+#define IRQ_IOP33X_DMA0_EOC 1
+#define IRQ_IOP33X_DMA1_EOT 2
+#define IRQ_IOP33X_DMA1_EOC 3
+#define IRQ_IOP33X_AA_EOT 6
+#define IRQ_IOP33X_AA_EOC 7
+#define IRQ_IOP33X_TIMER0 8
+#define IRQ_IOP33X_TIMER1 9
+#define IRQ_IOP33X_I2C_0 10
+#define IRQ_IOP33X_I2C_1 11
+#define IRQ_IOP33X_MSG 12
+#define IRQ_IOP33X_MSGIBQ 13
+#define IRQ_IOP33X_ATU_BIST 14
+#define IRQ_IOP33X_PERFMON 15
+#define IRQ_IOP33X_CORE_PMU 16
+#define IRQ_IOP33X_XINT0 24
+#define IRQ_IOP33X_XINT1 25
+#define IRQ_IOP33X_XINT2 26
+#define IRQ_IOP33X_XINT3 27
+#define IRQ_IOP33X_XINT8 32
+#define IRQ_IOP33X_XINT9 33
+#define IRQ_IOP33X_XINT10 34
+#define IRQ_IOP33X_XINT11 35
+#define IRQ_IOP33X_XINT12 36
+#define IRQ_IOP33X_XINT13 37
+#define IRQ_IOP33X_XINT14 38
+#define IRQ_IOP33X_XINT15 39
+#define IRQ_IOP33X_UART0 51
+#define IRQ_IOP33X_UART1 52
+#define IRQ_IOP33X_PBIE 53
+#define IRQ_IOP33X_ATU_CRW 54
+#define IRQ_IOP33X_ATU_ERR 55
+#define IRQ_IOP33X_MCU_ERR 56
+#define IRQ_IOP33X_DMA0_ERR 57
+#define IRQ_IOP33X_DMA1_ERR 58
+#define IRQ_IOP33X_AA_ERR 60
+#define IRQ_IOP33X_MSG_ERR 62
+#define IRQ_IOP33X_HPI 63
#define NR_IRQS 64
-#endif // _IRQ_H_
+#endif
diff --git a/include/asm-arm/arch-iop33x/memory.h b/include/asm-arm/arch-iop33x/memory.h
index de208d2cca4e..0d39139b241e 100644
--- a/include/asm-arm/arch-iop33x/memory.h
+++ b/include/asm-arm/arch-iop33x/memory.h
@@ -1,9 +1,9 @@
/*
- * linux/include/asm-arm/arch-iop33x/memory.h
+ * include/asm-arm/arch-iop33x/memory.h
*/
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
+#ifndef __MEMORY_H
+#define __MEMORY_H
#include <asm/hardware.h>
diff --git a/include/asm-arm/arch-iop33x/system.h b/include/asm-arm/arch-iop33x/system.h
index 8270ad9f86c8..00dd07ece262 100644
--- a/include/asm-arm/arch-iop33x/system.h
+++ b/include/asm-arm/arch-iop33x/system.h
@@ -1,7 +1,7 @@
/*
- * linux/include/asm-arm/arch-iop33x/system.h
+ * include/asm-arm/arch-iop33x/system.h
*
- * Copyright (C) 2001 MontaVista Software, Inc.
+ * Copyright (C) 2001 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -13,17 +13,10 @@ static inline void arch_idle(void)
cpu_do_idle();
}
-
static inline void arch_reset(char mode)
{
- *IOP3XX_PCSR = 0x30;
+ *IOP3XX_PCSR = 0x30;
- if ( 1 && mode == 's') {
- /* Jump into ROM at address 0 */
- cpu_reset(0);
- } else {
- /* No on-chip reset capability */
- cpu_reset(0);
- }
+ /* Jump into ROM at address 0 */
+ cpu_reset(0);
}
-
diff --git a/include/asm-arm/arch-iop33x/timex.h b/include/asm-arm/arch-iop33x/timex.h
index 8994322a09f4..fe3e1e369ff9 100644
--- a/include/asm-arm/arch-iop33x/timex.h
+++ b/include/asm-arm/arch-iop33x/timex.h
@@ -1,8 +1,9 @@
/*
- * linux/include/asm-arm/arch-iop33x/timex.h
+ * include/asm-arm/arch-iop33x/timex.h
*
* IOP3xx architecture timex specifications
*/
+
#include <asm/hardware.h>
#define CLOCK_TICK_RATE (100 * HZ)
diff --git a/include/asm-arm/arch-iop33x/uncompress.h b/include/asm-arm/arch-iop33x/uncompress.h
index 62904ae3b038..e17fbc05877b 100644
--- a/include/asm-arm/arch-iop33x/uncompress.h
+++ b/include/asm-arm/arch-iop33x/uncompress.h
@@ -1,6 +1,7 @@
/*
- * linux/include/asm-arm/arch-iop33x/uncompress.h
+ * include/asm-arm/arch-iop33x/uncompress.h
*/
+
#include <asm/types.h>
#include <asm/mach-types.h>
#include <linux/serial_reg.h>
@@ -8,13 +9,13 @@
static volatile u32 *uart_base;
-#define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE)
+#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE)
static inline void putc(char c)
{
while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
barrier();
- *uart_base = c;
+ uart_base[UART_TX] = c;
}
static inline void flush(void)
@@ -24,7 +25,7 @@ static inline void flush(void)
static __inline__ void __arch_decomp_setup(unsigned long arch_id)
{
if (machine_is_iq80331() || machine_is_iq80332())
- uart_base = (volatile u32 *)IOP331_UART0_PHYS;
+ uart_base = (volatile u32 *)IOP33X_UART0_PHYS;
else
uart_base = (volatile u32 *)0xfe800000;
}
diff --git a/include/asm-arm/arch-iop33x/vmalloc.h b/include/asm-arm/arch-iop33x/vmalloc.h
index b5092027449e..66f545a7f4fc 100644
--- a/include/asm-arm/arch-iop33x/vmalloc.h
+++ b/include/asm-arm/arch-iop33x/vmalloc.h
@@ -1,16 +1,5 @@
/*
- * linux/include/asm-arm/arch-iop33x/vmalloc.h
+ * include/asm-arm/arch-iop33x/vmalloc.h
*/
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 8MB value just means that there will be a 8MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- */
-//#define VMALLOC_END (0xe8000000)
-/* increase usable physical RAM to ~992M per RMK */
-#define VMALLOC_END (0xfe000000)
-
+#define VMALLOC_END 0xfe000000