diff options
author | Jack Lee <jack.lee@freescale.com> | 2012-10-03 13:31:47 +0800 |
---|---|---|
committer | Jack Lee <jack.lee@freescale.com> | 2012-10-15 15:55:45 +0800 |
commit | 255faab9b66c8450c3f1f9c49af8ceb27f48fefe (patch) | |
tree | 17a3b799ba002d31619ba1e8de0ce426f8790bf5 /include | |
parent | 7a316704cc0b7210b3109dde7c7d7dc3df4e195a (diff) |
ENGR00223348 EPDC: Unable to enable DISPLAY regulator
In the maxim 17135 driver, the power good is confirmed by the
power good GPIO polarity change when comparing the status at
the beginning of driver probe and display regulator enabled.
However, it is not reliable since the initial value of the GPIO
is not constant. Normally, it is 1 but it can be 0 after system reset
unexpectedly. Now, it is changed to POK bit checking in FAULT register.
Signed-off-by: Jack Lee <jack.lee@freescale.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mfd/max17135.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/include/linux/mfd/max17135.h b/include/linux/mfd/max17135.h index 265b1588c10a..5785ed415a71 100644 --- a/include/linux/mfd/max17135.h +++ b/include/linux/mfd/max17135.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -167,9 +167,6 @@ struct max17135 { /* powerup/powerdown wait time */ int max_wait; - - /* Dynamically determined polarity for PWRGOOD */ - int pwrgood_polarity; }; enum { |