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author | Nicolas Ferre <nicolas.ferre@microchip.com> | 2017-03-14 09:38:04 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-03-30 09:35:18 +0200 |
commit | 2705b183263bd6e2969a648d2c7353716ca1d7a8 (patch) | |
tree | 00488293c1649918d194b3d6b29c0355485539f6 /include | |
parent | 55b6c187cf9d12d8e667ccfa5386bd162fc7ae2b (diff) |
ARM: at91: pm: cpu_idle: switch DDR to power-down mode
commit 60b89f1928af80b546b5c3fd8714a62f6f4b8844 upstream.
On some DDR controllers, compatible with the sama5d3 one,
the sequence to enter/exit/re-enter the self-refresh mode adds
more constrains than what is currently written in the at91_idle
driver. An actual access to the DDR chip is needed between exit
and re-enter of this mode which is somehow difficult to implement.
This sequence can completely hang the SoC. It is particularly
experienced on parts which embed a L2 cache if the code run
between IDLE calls fits in it...
Moreover, as the intention is to enter and exit pretty rapidly
from IDLE, the power-down mode is a good candidate.
So now we use power-down instead of self-refresh. As we can
simplify the code for sama5d3 compatible DDR controllers,
we instantiate a new sama5d3_ddr_standby() function.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Fixes: 017b5522d5e3 ("ARM: at91: Add new binding for sama5d3-ddramc")
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions