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authorDan Carpenter <dan.carpenter@oracle.com>2016-01-20 12:54:51 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-04-12 09:08:36 -0700
commit608377369dcebfa0dc9506a4f17d008bc93bb5b9 (patch)
tree38290fe6e62018489b8623a69f1b1576a085c22a /init
parentdff87fa52ddf26df67526d303d08226e7168560b (diff)
EDAC, amd64_edac: Shift wrapping issue in f1x_get_norm_dct_addr()
commit 6f3508f61c814ee852c199988a62bd954c50dfc1 upstream. dct_sel_base_off is declared as a u64 but we're only using the lower 32 bits because of a shift wrapping bug. This can possibly truncate the upper 16 bits of DctSelBaseOffset[47:26], causing us to misdecode the CS row. Fixes: c8e518d5673d ('amd64_edac: Sanitize f10_get_base_addr_offset') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/20160120095451.GB19898@mwanda Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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