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| author | Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com> | 2009-12-10 14:43:56 -0600 |
|---|---|---|
| committer | Alejandro Gonzalez <alex.gonzalez@digi.com> | 2010-02-12 17:19:45 +0100 |
| commit | 9ba449e22ef33129d1d2e82c30cfcccb922ffc96 (patch) | |
| tree | 5771734209da6c8a9297feb24804f2fce7342183 /init | |
| parent | 6bf49f588ac3cfd943bd4bf305bc4949240dfb98 (diff) | |
ENGR00119202: Fix DVFS-PER related bugs.
DVFS-PER needs to make sure that the pixel clock divider is an
even integer.
Added support for pixel clock being sourced from an external clock (PLL3)
Signed-off-by: Ranjani Vaidyanathan-RA5478 <Ranjani.Vaidyanathan@freescale.com>
Diffstat (limited to 'init')
0 files changed, 0 insertions, 0 deletions