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authorStephen Warren <swarren@nvidia.com>2014-03-03 14:51:15 -0700
committerStephen Warren <swarren@nvidia.com>2014-03-05 13:29:13 -0700
commite30cb2388ab68de68142120ab9fca5ae6e377682 (patch)
tree74daa407671bb5b33abc0b882b8dd95ae3297647 /ipc/syscall.c
parentfdc44f9491cda0607b9c4b2ddb95bd742418635e (diff)
ARM: tegra: use 2 address cells for Tegra124 DT
Tegra124 can support 4GB of RAM. With that much RAM (plus some memory- mapped IO peripherals), more than 32-bits of physical address space is required. Hence, convert all Tegra124 DTs to use 2 DT cells for address space. (I think this was suggested by Olof Johansson, but I'm not 100% sure) Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'ipc/syscall.c')
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