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author | Alex Frid <afrid@nvidia.com> | 2014-02-27 19:33:47 -0800 |
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committer | Yu-Huan Hsu <yhsu@nvidia.com> | 2014-03-03 12:44:39 -0800 |
commit | 33db1f7eb8e2d9eaad2dce65152cd5b2a4a27fae (patch) | |
tree | 40ec8e5305dce220efd4e160d897eba68f4c3339 /ipc | |
parent | c4d2162fd12ee7215fe6b1d4473f1b8ca832db30 (diff) |
ARM: tegra: dvfs: Update DFLL Fmax@Vmin calibration
- Completely skipped calibration if calibration delay is zero (used
to only stop calibration timer in this case, but still calibrated on
request)
- When storing calibration results checked Vmin consistency. In theory
high tuning low limit may push calibrated rate higher current thermal
floor; in this case default characterized Fmax@Vmin is always used as a
base for the calibration (instead of previous calibration result).
Change-Id: I2419e0d5b278e97108d94db34014652aad7f8f74
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/376248
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'ipc')
0 files changed, 0 insertions, 0 deletions