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authorChris Dearman <chris@mips.com>2006-08-07 15:08:01 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-09-27 13:37:33 +0100
commit847b9dfccad7dd34b2e44b1c6ceeb1c4cb88084a (patch)
tree46374a118b2f42c17aef00ec478021043e56e38b /kernel/taskstats.c
parentbca70d24c09b740d6fd96b972011644cba8383d6 (diff)
[MIPS] MT: Initialise all writable bits in Cause register to zero.
Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an immediate exception when starting the second VPE. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'kernel/taskstats.c')
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